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[93.34.90.105]) by smtp.googlemail.com with ESMTPSA id 98e67ed59e1d1-2c2dd785762sm6705086a91.37.2024.06.11.04.36.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jun 2024 04:36:12 -0700 (PDT) From: Christian Marangi To: Hauke Mehrtens , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Christian Marangi , =?utf-8?q?=C3=81lvaro_Fern=C3=A1n?= =?utf-8?q?dez_Rojas?= , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Daniel_Gonz=C3=A1lez_Cabanelas?= Subject: [PATCH v7 5/5] mips: bmips: enable RAC on BMIPS4350 Date: Tue, 11 Jun 2024 13:35:37 +0200 Message-ID: <20240611113538.9004-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240611113538.9004-1-ansuelsmth@gmail.com> References: <20240611113538.9004-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Daniel González Cabanelas The data RAC is left disabled by the bootloader in some SoCs, at least in the core it boots from. Enabling this feature increases the performance up to +30% depending on the task. Signed-off-by: Daniel González Cabanelas Signed-off-by: Álvaro Fernández Rojas [ rework code and reduce code duplication ] Acked-by: Florian Fainelli Signed-off-by: Christian Marangi --- arch/mips/kernel/smp-bmips.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c index 20e2fb10022d..e30342af8d91 100644 --- a/arch/mips/kernel/smp-bmips.c +++ b/arch/mips/kernel/smp-bmips.c @@ -598,6 +598,7 @@ asmlinkage void __weak plat_wired_tlb_setup(void) void bmips_cpu_setup(void) { void __iomem __maybe_unused *cbr = bmips_cbr_addr; + u32 __maybe_unused rac_addr; u32 __maybe_unused cfg; switch (current_cpu_type()) { @@ -626,6 +627,23 @@ void bmips_cpu_setup(void) __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE); break; + case CPU_BMIPS4350: + rac_addr = BMIPS_RAC_CONFIG_1; + + if (!(read_c0_brcm_cmt_local() & (1 << 31))) + rac_addr = BMIPS_RAC_CONFIG; + + /* Enable data RAC */ + cfg = __raw_readl(cbr + rac_addr); + __raw_writel(cfg | 0xf, cbr + rac_addr); + __raw_readl(cbr + rac_addr); + + /* Flush stale data out of the readahead cache */ + cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); + __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); + __raw_readl(cbr + BMIPS_RAC_CONFIG); + break; + case CPU_BMIPS4380: /* CBG workaround for early BMIPS4380 CPUs */ switch (read_c0_prid()) {