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Wed, 12 Jun 2024 05:53:35 -0400 (EDT) From: Jiaxun Yang Date: Wed, 12 Jun 2024 10:53:30 +0100 Subject: [PATCH v2 2/4] MIPS: Introduce config options for LLSC availability Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240612-mips-llsc-v2-2-a42bd5562bdb@flygoat.com> References: <20240612-mips-llsc-v2-0-a42bd5562bdb@flygoat.com> In-Reply-To: <20240612-mips-llsc-v2-0-a42bd5562bdb@flygoat.com> To: Thomas Bogendoerfer Cc: Jonas Gorski , "Maciej W. Rozycki" , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4430; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=dBYBJUV94eWDrUQ36fbRfMft6NGiZT3vPMdQLOfyh3s=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrTMAlmzSrE/796uPNV07vnHpS420tFOBWfeN9T2Za1dO XnvzEflHaUsDGJcDLJiiiwhAkp9GxovLrj+IOsPzBxWJpAhDFycAjCRHUIM/8vyl+5S6T35LO6E 94LeZ1PdP3hlNphHZ9dVeFSml6pURzD8T8mIqtVpO/c3xGzJtLc3z/CX1UbPNXulmV2+ifnWx+f nWQA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Introduce CPU_HAS_LLSC and CPU_MAY_HAVE_LLSC to determine availability of LLSC and Kconfig level. They are both true for almost all supported CPUs besides: R3000: Doesn't have LLSC, so both false. R5000 series: LLSC is unusable for 64bit kernel, so both false. R10000: Some platforms decided to opt-out LLSC due to errata, so only select CPU_MAY_HAVE_LLSC. WAR_4KC_LLSC: LLSC is buggy on certain reversion, which can be detected at cpu-probe or platform override, so only select CPU_MAY_HAVE_LLSC. Signed-off-by: Jiaxun Yang --- v2: Make cpu_has_llsc logic clear --- arch/mips/Kconfig | 20 ++++++++++++++++++++ arch/mips/include/asm/cpu-features.h | 9 ++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8ac467c1f9c8..50260a7e9b54 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1548,6 +1548,7 @@ config CPU_R3000 config CPU_R4300 bool "R4300" depends on SYS_HAS_CPU_R4300 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1556,6 +1557,7 @@ config CPU_R4300 config CPU_R4X00 bool "R4x00" depends on SYS_HAS_CPU_R4X00 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HUGEPAGES @@ -1566,6 +1568,7 @@ config CPU_R4X00 config CPU_TX49XX bool "R49XX" depends on SYS_HAS_CPU_TX49XX + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1574,6 +1577,7 @@ config CPU_TX49XX config CPU_R5000 bool "R5000" depends on SYS_HAS_CPU_R5000 + select CPU_HAS_LLSC if !64BIT select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HUGEPAGES @@ -1583,6 +1587,7 @@ config CPU_R5000 config CPU_R5500 bool "R5500" depends on SYS_HAS_CPU_R5500 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HUGEPAGES @@ -1593,6 +1598,7 @@ config CPU_R5500 config CPU_NEVADA bool "RM52xx" depends on SYS_HAS_CPU_NEVADA + select CPU_HAS_LLSC if !64BIT select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HUGEPAGES @@ -1602,6 +1608,8 @@ config CPU_NEVADA config CPU_R10000 bool "R10000" depends on SYS_HAS_CPU_R10000 + select CPU_HAS_LLSC if !WAR_R10000_LLSC + select CPU_MAY_HAVE_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1613,6 +1621,7 @@ config CPU_R10000 config CPU_RM7000 bool "RM7000" depends on SYS_HAS_CPU_RM7000 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1622,6 +1631,7 @@ config CPU_RM7000 config CPU_SB1 bool "SB1" depends on SYS_HAS_CPU_SB1 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM @@ -1656,6 +1666,7 @@ config CPU_BMIPS select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select DMA_NONCOHERENT select IRQ_MIPS_CPU @@ -2381,6 +2392,15 @@ config CPU_DIEI_BROKEN config CPU_HAS_RIXI bool +# For CPU that must have LLSC +config CPU_HAS_LLSC + def_bool TARGET_ISA_REV > 0 && !WAR_4KC_LLSC + select CPU_MAY_HAVE_LLSC + +# For CPU that LLSC support is optional +config CPU_MAY_HAVE_LLSC + def_bool TARGET_ISA_REV > 0 + config CPU_NO_LOAD_STORE_LR bool help diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 404390bb87ea..40f5570de563 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -185,8 +185,15 @@ #ifndef cpu_has_ejtag #define cpu_has_ejtag __opt(MIPS_CPU_EJTAG) #endif + #ifndef cpu_has_llsc -#define cpu_has_llsc __isa_ge_or_opt(1, MIPS_CPU_LLSC) +# if defined(CONFIG_CPU_HAS_LLSC) +# define cpu_has_llsc 1 +# elif defined(CONFIG_CPU_MAY_HAVE_LLSC) +# define cpu_has_llsc __opt(MIPS_CPU_LLSC) +# else +# define cpu_has_llsc 0 +# endif #endif #ifndef kernel_uses_llsc #define kernel_uses_llsc cpu_has_llsc