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Tue, 18 Jun 2024 11:11:31 -0400 (EDT) From: Jiaxun Yang Date: Tue, 18 Jun 2024 16:11:08 +0100 Subject: [PATCH v3 8/8] dt-bindings: mips: img: Add devices binding Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240618-boston-syscon-v3-8-c47c06647a26@flygoat.com> References: <20240618-boston-syscon-v3-0-c47c06647a26@flygoat.com> In-Reply-To: <20240618-boston-syscon-v3-0-c47c06647a26@flygoat.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Burton , Thomas Bogendoerfer Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6540; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=HbywrLNjiENzD/e6xffmJVBjKdIskJSRjWMdv+Fu+oY=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrTCxb0iWgWrvsRcL3Zyqtg4b+O32BWyfGV/91bprgxrv LlL89y2jlIWBjEuBlkxRZYQAaW+DY0XF1x/kPUHZg4rE8gQBi5OAZjIyduMDI8dGpx1M4MjnS7W Gu+WbnZ7dm2vRDZLQOCUeccb9pa2tzH8z2L+Znbr/v1NlRwHn17yXBplwPJhsvcP9wvHGIsPzdF YxwMA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Add devices binding for various Imagination Technologies MIPS based Platforms. Remove old documents. Signed-off-by: Jiaxun Yang Reviewed-by: Krzysztof Kozlowski --- v3: Remove old bindings, they are not relavant any more. Booting protocol stuff is covered by spec. --- .../devicetree/bindings/mips/img/devices.yaml | 33 +++++++++ .../bindings/mips/img/pistachio-marduk.txt | 10 --- .../devicetree/bindings/mips/img/pistachio.txt | 42 ----------- .../devicetree/bindings/mips/img/xilfpga.txt | 83 ---------------------- 4 files changed, 33 insertions(+), 135 deletions(-) diff --git a/Documentation/devicetree/bindings/mips/img/devices.yaml b/Documentation/devicetree/bindings/mips/img/devices.yaml new file mode 100644 index 000000000000..460ca96577ad --- /dev/null +++ b/Documentation/devicetree/bindings/mips/img/devices.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/img/devices.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Imagination Technologies MIPS based Platforms + +maintainers: + - Jiaxun Yang + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: IMG Boston + const: img,boston + + - description: IMG Marduk (Creator Ci40) + items: + - const: img,pistachio-marduk + - const: img,pistachio + + - description: Imagination University Program MIPSfpga + items: + - const: img,xilfpga + - const: digilent,nexys4ddr + +additionalProperties: true + +... diff --git a/Documentation/devicetree/bindings/mips/img/pistachio-marduk.txt b/Documentation/devicetree/bindings/mips/img/pistachio-marduk.txt deleted file mode 100644 index 2d5126d529a2..000000000000 --- a/Documentation/devicetree/bindings/mips/img/pistachio-marduk.txt +++ /dev/null @@ -1,10 +0,0 @@ -Imagination Technologies' Pistachio SoC based Marduk Board -========================================================== - -Compatible string must be "img,pistachio-marduk", "img,pistachio" - -Hardware and other related documentation is available at -https://docs.creatordev.io/ci40/ - -It is also known as Creator Ci40. Marduk is legacy name and will -be there for decades. diff --git a/Documentation/devicetree/bindings/mips/img/pistachio.txt b/Documentation/devicetree/bindings/mips/img/pistachio.txt deleted file mode 100644 index a736d889c2b8..000000000000 --- a/Documentation/devicetree/bindings/mips/img/pistachio.txt +++ /dev/null @@ -1,42 +0,0 @@ -Imagination Pistachio SoC -========================= - -Required properties: --------------------- - - compatible: Must include "img,pistachio". - -CPU nodes: ----------- -A "cpus" node is required. Required properties: - - #address-cells: Must be 1. - - #size-cells: Must be 0. -A CPU sub-node is also required for at least CPU 0. Since the topology may -be probed via CPS, it is not necessary to specify secondary CPUs. Required -propertis: - - device_type: Must be "cpu". - - compatible: Must be "mti,interaptiv". - - reg: CPU number. - - clocks: Must include the CPU clock. See ../../clock/clock-bindings.txt for - details on clock bindings. -Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "mti,interaptiv"; - reg = <0>; - clocks = <&clk_core CLK_MIPS>; - }; - }; - - -Boot protocol: --------------- -In accordance with the MIPS UHI specification[1], the bootloader must pass the -following arguments to the kernel: - - $a0: -2. - - $a1: KSEG0 address of the flattened device-tree blob. - -[1] http://prplfoundation.org/wiki/MIPS_documentation diff --git a/Documentation/devicetree/bindings/mips/img/xilfpga.txt b/Documentation/devicetree/bindings/mips/img/xilfpga.txt deleted file mode 100644 index 57e7ee942166..000000000000 --- a/Documentation/devicetree/bindings/mips/img/xilfpga.txt +++ /dev/null @@ -1,83 +0,0 @@ -Imagination University Program MIPSfpga -======================================= - -Under the Imagination University Program, a microAptiv UP core has been -released for academic usage. - -As we are dealing with a MIPS core instantiated on an FPGA, specifications -are fluid and can be varied in RTL. - -This binding document is provided as baseline guidance for the example -project provided by IMG. - -The example project runs on the Nexys4DDR board by Digilent powered by -the ARTIX-7 FPGA by Xilinx. - -Relevant details about the example project and the Nexys4DDR board: - -- microAptiv UP core m14Kc -- 50MHz clock speed -- 128Mbyte DDR RAM at 0x0000_0000 -- 8Kbyte RAM at 0x1000_0000 -- axi_intc at 0x1020_0000 -- axi_uart16550 at 0x1040_0000 -- axi_gpio at 0x1060_0000 -- axi_i2c at 0x10A0_0000 -- custom_gpio at 0x10C0_0000 -- axi_ethernetlite at 0x10E0_0000 -- 8Kbyte BootRAM at 0x1FC0_0000 - -Required properties: --------------------- - - compatible: Must include "digilent,nexys4ddr","img,xilfpga". - -CPU nodes: ----------- -A "cpus" node is required. Required properties: - - #address-cells: Must be 1. - - #size-cells: Must be 0. -A CPU sub-node is also required for at least CPU 0. Required properties: - - device_type: Must be "cpu". - - compatible: Must be "mips,m14Kc". - - reg: Must be <0>. - - clocks: phandle to ext clock for fixed-clock received by MIPS core. - -Example: - - compatible = "img,xilfpga","digilent,nexys4ddr"; - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "mips,m14Kc"; - reg = <0>; - clocks = <&ext>; - }; - }; - - ext: ext { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; - }; - -Boot protocol: --------------- - -The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000. -This is for easy reprogrammibility via JTAG. - -The BootRAM initializes the cache and the axi_uart peripheral. - -DDR initialization is already handled by a HW IP block. - -When the example project bitstream is loaded, the cpu_reset button -needs to be pressed. - -The bootram initializes the cache and axi_uart. -Then outputs MIPSFPGA\n\r on the serial port on the Nexys4DDR board. - -At this point, the board is ready to load the Linux kernel -vmlinux file via JTAG.