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Sat, 13 Jul 2024 22:41:09 -0400 (EDT) From: Jiaxun Yang Date: Sun, 14 Jul 2024 10:41:05 +0800 Subject: [PATCH] MIPS: Loongson64: Switch to SYNC_R4K Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240714-loongson64-cevt-r4k-v1-1-98afed7260aa@flygoat.com> X-B4-Tracking: v=1; b=H4sIAMA6k2YC/x3MTQqAIBBA4avErBuwGPq7SrQwnWwoNDQiiO6et PwW7z2QOAonGIoHIl+SJPiMqizArNo7RrHZUKuaVFsR7iF4l4JvCA1fJ0bakOeWLGnbd2Qgl0f kRe7/Ok7v+wE9a/iSZQAAAA== To: Thomas Bogendoerfer , Huacai Chen Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3712; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=+BMX64LMqIy0Yju1SylS95nPoAjrSTts7QMuygG+Spc=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrTJVkd7zltMkbIqOLC29dCT2Z1/+F5WNfycEOlsr+ZRs ijlRv/bjlIWBjEuBlkxRZYQAaW+DY0XF1x/kPUHZg4rE8gQBi5OAZhIsBQjwzX1Z+WslauZIxPU PvRf5548zfnMQTOx6u6Zlyp8kre8EmH4n+cfbXFdwoGpuEmWPfjJc9mPSbl9Bqq7XIR5traL9Bp zAwA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Nowadays SYNC_R4K is performing better than Loongson64's custom sync mechanism. Switch to SYNC_R4K to improve performance and reduce code duplication. Signed-off-by: Jiaxun Yang Reviewed-by: Huacai Chen --- Last minute for 6.11 :-) --- arch/mips/Kconfig | 1 + arch/mips/include/asm/smp.h | 1 - arch/mips/loongson64/smp.c | 35 ++--------------------------------- 3 files changed, 3 insertions(+), 34 deletions(-) --- base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233 change-id: 20240714-loongson64-cevt-r4k-eb74d4ad984c Best regards, diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 1236ea122061..e163059dd4d3 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -478,6 +478,7 @@ config MACH_LOONGSON64 select BOARD_SCACHE select CSRC_R4K select CEVT_R4K + select SYNC_R4K select FORCE_PCI select ISA select I8259 diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h index bc2c240f414b..2427d76f953f 100644 --- a/arch/mips/include/asm/smp.h +++ b/arch/mips/include/asm/smp.h @@ -50,7 +50,6 @@ extern int __cpu_logical_map[NR_CPUS]; #define SMP_CALL_FUNCTION 0x2 /* Octeon - Tell another core to flush its icache */ #define SMP_ICACHE_FLUSH 0x4 -#define SMP_ASK_C0COUNT 0x8 /* Mask of CPUs which are currently definitely operating coherently */ extern cpumask_t cpu_coherent_mask; diff --git a/arch/mips/loongson64/smp.c b/arch/mips/loongson64/smp.c index 66d049cdcf14..147acd972a07 100644 --- a/arch/mips/loongson64/smp.c +++ b/arch/mips/loongson64/smp.c @@ -33,7 +33,6 @@ static void __iomem *ipi_clear0_regs[16]; static void __iomem *ipi_status0_regs[16]; static void __iomem *ipi_en0_regs[16]; static void __iomem *ipi_mailbox_buf[16]; -static uint32_t core0_c0count[NR_CPUS]; static u32 (*ipi_read_clear)(int cpu); static void (*ipi_write_action)(int cpu, u32 action); @@ -382,11 +381,10 @@ loongson3_send_ipi_mask(const struct cpumask *mask, unsigned int action) ipi_write_action(cpu_logical_map(i), (u32)action); } - static irqreturn_t loongson3_ipi_interrupt(int irq, void *dev_id) { - int i, cpu = smp_processor_id(); - unsigned int action, c0count; + int cpu = smp_processor_id(); + unsigned int action; action = ipi_read_clear(cpu); @@ -399,26 +397,14 @@ static irqreturn_t loongson3_ipi_interrupt(int irq, void *dev_id) irq_exit(); } - if (action & SMP_ASK_C0COUNT) { - BUG_ON(cpu != 0); - c0count = read_c0_count(); - c0count = c0count ? c0count : 1; - for (i = 1; i < nr_cpu_ids; i++) - core0_c0count[i] = c0count; - nudge_writes(); /* Let others see the result ASAP */ - } - return IRQ_HANDLED; } -#define MAX_LOOPS 800 /* * SMP init and finish on secondary CPUs */ static void loongson3_init_secondary(void) { - int i; - uint32_t initcount; unsigned int cpu = smp_processor_id(); unsigned int imask = STATUSF_IP7 | STATUSF_IP6 | STATUSF_IP3 | STATUSF_IP2; @@ -432,23 +418,6 @@ static void loongson3_init_secondary(void) cpu_logical_map(cpu) % loongson_sysconf.cores_per_package); cpu_data[cpu].package = cpu_logical_map(cpu) / loongson_sysconf.cores_per_package; - - i = 0; - core0_c0count[cpu] = 0; - loongson3_send_ipi_single(0, SMP_ASK_C0COUNT); - while (!core0_c0count[cpu]) { - i++; - cpu_relax(); - } - - if (i > MAX_LOOPS) - i = MAX_LOOPS; - if (cpu_data[cpu].package) - initcount = core0_c0count[cpu] + i; - else /* Local access is faster for loops */ - initcount = core0_c0count[cpu] + i/2; - - write_c0_count(initcount); } static void loongson3_smp_finish(void)