[v3,1/3] dt-bindings: net: Add Realtek MDIO controller

Commit Message

Chris Packham Dec. 17, 2024, 10:44 p.m. UTC

Add dtschema for the MDIO controller found in the RTL9300 SoCs. The
controller is slightly unusual in that direct MDIO communication is not
possible. Instead, the SMI bus and PHY address are associated with a
switch port and the port number is used when talking to the PHY.

Signed-off-by: Chris Packham <[e-mail]>
Reviewed-by: Conor Dooley <[e-mail]>
---

Notes:
    Changes in v3:
    - Add r-by from Connor
    Changes in v2:
    - None

 .../bindings/net/realtek,rtl9301-mdio.yaml    | 82 +++++++++++++++++++
 1 file changed, 82 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml

Comments

Daniel Golle Dec. 17, 2024, 11:54 p.m. UTC | #1

On Wed, Dec 18, 2024 at 11:44:59AM +1300, Chris Packham wrote:
> [...]
> +patternProperties:
> +  '^ethernet-phy(@[a-f0-9]+)?':
> +    type: object
> +    $ref: ethernet-phy.yaml#
> +
> +    properties:
> +      reg:
> +        description:
> +          The MDIO communication on the RTL9300 is abstracted by the switch. At
> +          the software level communication uses the switch port to address the
> +          PHY with the actual MDIO bus and address having been setup via the
> +          realtek,smi-address property.
> +
> +      realtek,smi-address:
> +        $ref: /schemas/types.yaml#/definitions/uint32-array
> +        description: SMI interface and address for the connected PHY
> +        items:
> +          - description: SMI interface number associated with the port.
> +          - description: SMI address of the PHY for the port.

What speaks against describing the actual MDIO busses and addresses (ie.
the hardware) in Device Tree and setting up the hardware mapping between
ports and SMI bus and address by parsing the DSA switch port description
in the MDIO driver?

In that way you would not need the additional vendor-specific property
and on switches with high port density also avoid having to deal with
bogus "MDIO addresses" greater than 31.

Chris Packham Dec. 19, 2024, 8:44 p.m. UTC | #2

Hi Daniel,

On 18/12/2024 12:54, Daniel Golle wrote:
> On Wed, Dec 18, 2024 at 11:44:59AM +1300, Chris Packham wrote:
>> [...]
>> +patternProperties:
>> +  '^ethernet-phy(@[a-f0-9]+)?':
>> +    type: object
>> +    $ref: ethernet-phy.yaml#
>> +
>> +    properties:
>> +      reg:
>> +        description:
>> +          The MDIO communication on the RTL9300 is abstracted by the switch. At
>> +          the software level communication uses the switch port to address the
>> +          PHY with the actual MDIO bus and address having been setup via the
>> +          realtek,smi-address property.
>> +
>> +      realtek,smi-address:
>> +        $ref: /schemas/types.yaml#/definitions/uint32-array
>> +        description: SMI interface and address for the connected PHY
>> +        items:
>> +          - description: SMI interface number associated with the port.
>> +          - description: SMI address of the PHY for the port.
> What speaks against describing the actual MDIO busses and addresses (ie.
> the hardware) in Device Tree and setting up the hardware mapping between
> ports and SMI bus and address by parsing the DSA switch port description
> in the MDIO driver?
>
> In that way you would not need the additional vendor-specific property
> and on switches with high port density also avoid having to deal with
> bogus "MDIO addresses" greater than 31.

I kind of expected this discussion.

The main problem is I couldn't figure out how to make that work. 
Ultimately I still need to write the MDIO bus arrangement to hardware 
and map back to a port number when doing MDIO accesses. Whether the 
device-tree uses port number as the reg property and a vendor property 
for the SMI address or does it the other way round I'd still need a 
vendor property. There's also a complication that I've got one MDIO 
controller that looks after more than one MDIO interface at the same 
time. I'll have a bit of a think about it over the holidays and see if I 
can come up with anything cleaner.

Patch

diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml
new file mode 100644
index 000000000000..95ed77ff8dcc
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml
@@ -0,0 +1,82 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek RTL9300 MDIO Controller
+
+maintainers:
+  - Chris Packham <[e-mail]>
+
+allOf:
+  - $ref: mdio.yaml#
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - realtek,rtl9302b-mdio
+              - realtek,rtl9302c-mdio
+              - realtek,rtl9303-mdio
+          - const: realtek,rtl9301-mdio
+      - const: realtek,rtl9301-mdio
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 0
+
+  reg:
+    maxItems: 1
+
+patternProperties:
+  '^ethernet-phy(@[a-f0-9]+)?':
+    type: object
+    $ref: ethernet-phy.yaml#
+
+    properties:
+      reg:
+        description:
+          The MDIO communication on the RTL9300 is abstracted by the switch. At
+          the software level communication uses the switch port to address the
+          PHY with the actual MDIO bus and address having been setup via the
+          realtek,smi-address property.
+
+      realtek,smi-address:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description: SMI interface and address for the connected PHY
+        items:
+          - description: SMI interface number associated with the port.
+          - description: SMI address of the PHY for the port.
+
+    unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    mdio@ca00 {
+        compatible = "realtek,rtl9301-mdio";
+        reg = <0xca00 0x200>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        ethernet-phy@0 {
+            compatible = "ethernet-phy-ieee802.3-c45";
+            reg = <0>;
+            realtek,smi-address = <0 1>;
+        };
+
+        ethernet-phy@8 {
+            compatible = "ethernet-phy-ieee802.3-c45";
+            reg = <8>;
+            realtek,smi-address = <1 1>;
+        };
+    };