| Message ID | 20250119183424.259353-7-sander@svanheule.net (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | mips: dts: Split Realtek devicetrees | expand |
diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi index 21fb584e6383..e3183a71765e 100644 --- a/arch/mips/boot/dts/realtek/rtl838x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl838x.dtsi @@ -46,7 +46,7 @@ uart0: serial@2000 { clock-frequency = <200000000>; - interrupt-parent = <&cpuintc>; + interrupt-parent = <&intc>; interrupts = <31>; reg-io-width = <1>; @@ -63,7 +63,7 @@ uart1: serial@2100 { clock-frequency = <200000000>; - interrupt-parent = <&cpuintc>; + interrupt-parent = <&intc>; interrupts = <30>; reg-io-width = <1>;
The uart interrupts on RTL838x chips do not lead to the CPU's interrupt controller directly, but passes via the SoC interrupt controller. Update the interrupt-parent property to fix this. Signed-off-by: Sander Vanheule <sander@svanheule.net> --- arch/mips/boot/dts/realtek/rtl838x.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)