From patchwork Sun Nov 24 11:40:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 11259129 X-Patchwork-Delegate: paulburton@kernel.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B22C8138C for ; Sun, 24 Nov 2019 11:41:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 940812075E for ; Sun, 24 Nov 2019 11:41:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=goldelico.com header.i=@goldelico.com header.b="hgjYrSvF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727088AbfKXLkr (ORCPT ); Sun, 24 Nov 2019 06:40:47 -0500 Received: from mo4-p03-ob.smtp.rzone.de ([85.215.255.100]:9619 "EHLO mo4-p03-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726740AbfKXLkq (ORCPT ); Sun, 24 Nov 2019 06:40:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1574595643; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=ZYQzlQVMDmnVrRYXkfhAI7LtxZT/3zaRWYdCXsxRj0I=; b=hgjYrSvFGL9sesnDgiN0jpRRjgM8SsSO/fPyvx6dQD5jnKQBBLKUCISIo6fyCCweHp Wv/a8TTpm7fcfFwofDptqVvRoFA1tTQMD94lK0TBlQLE4BDUagu2rfx5uT1mM93YvTTu sLpLBBKBNolC//OF5PynBuoTjRZR7mw9ElLEDOxdxHg90wP4PU+1O96gUUQLdcsRWxTZ rUok1jILws8R5Xopo60fQj8llG2xUGgPXn/haTmWCsTWTmotys53vy7TixfmElVmdTCM KIS2k3mOv8fNC4p6v0GWqTCbIynkv9iSZIL3XGfJcEUcOnf0DHUmJCuQKO7c+4a4vzw4 lu7A== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1mfYzBGHXH4HEaKeuIV" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 44.29.0 DYNA|AUTH) with ESMTPSA id L09db3vAOBeUwES (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Sun, 24 Nov 2019 12:40:30 +0100 (CET) From: "H. Nikolaus Schaller" To: David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Paul Cercueil , Ralf Baechle , Paul Burton , James Hogan Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, openpvrsgx-devgroup@letux.org, letux-kernel@openphoenux.org, kernel@pyra-handheld.com, linux-mips@vger.kernel.org, "H. Nikolaus Schaller" Subject: [PATCH v3 2/8] ARM: DTS: am33xx: add sgx gpu child node Date: Sun, 24 Nov 2019 12:40:22 +0100 Message-Id: <2ae609d6958727723ebaea2cfb62b547b38c23ee.1574595627.git.hns@goldelico.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org and add timer and interrupt Tested-by: H. Nikolaus Schaller # BeagleBone Black Signed-off-by: H. Nikolaus Schaller --- arch/arm/boot/dts/am33xx.dtsi | 38 +++++++++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index a9d848d50b20..1fbc8a2cc7fd 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -480,13 +480,43 @@ #size-cells = <1>; ranges = <0 0x56000000 0x1000000>; - /* - * Closed source PowerVR driver, no child device - * binding or driver in mainline - */ + sgx: gpu@0 { + compatible = "ti,am3352-sgx530-125", "img,sgx530-125", "img,sgx530"; + reg = <0x00 0x1000000>; /* 16 MB */ + interrupts = <37>; + }; }; }; }; #include "am33xx-l4.dtsi" #include "am33xx-clocks.dtsi" + +&prcm { + prm_per: prm@c00 { + compatible = "ti,am3-prm-inst"; + reg = <0xc00 0x100>; + #reset-cells = <1>; + clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>; + }; + + prm_wkup: prm@d00 { + compatible = "ti,am3-prm-inst"; + reg = <0xd00 0x100>; + #reset-cells = <1>; + clocks = <&l4_wkup_clkctrl AM3_WKUP_M3_CLKCTRL 0>; + }; + + prm_device: prm@f00 { + compatible = "ti,am3-prm-inst"; + reg = <0xf00 0x100>; + #reset-cells = <1>; + }; + + prm_gfx: prm@1100 { + compatible = "ti,am3-prm-inst"; + reg = <0x1100 0x100>; + #reset-cells = <1>; + clocks = <&gfx_l3_clkctrl AM3_GFX_CLKCTRL 0>; + }; +};