From patchwork Sat Feb 12 14:19:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12744287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3520AC433FE for ; Sat, 12 Feb 2022 14:19:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235885AbiBLOTu (ORCPT ); Sat, 12 Feb 2022 09:19:50 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:33326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235831AbiBLOTt (ORCPT ); Sat, 12 Feb 2022 09:19:49 -0500 Received: from mo4-p03-ob.smtp.rzone.de (mo4-p03-ob.smtp.rzone.de [85.215.255.104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72990245BC; Sat, 12 Feb 2022 06:19:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1644675569; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=85VAZNuu0z1bN9MxYW4uH2B00Go3jp3bKylcOi2Byxs=; b=rc/Fc/IOGjosKwkQcNEMs7JkgSXK5WZdICMAQNoO/81cxdnXiGadZGKpxtgOEk08Ht JAvwHJVv1LJPgJYZxRVHejRtxoD04eb/t2kklG1uA1WRM65B5xGkUoJYJVq5HXPYx70t c5oqeaOdQDjtRnQOKkvNR+DunF0i+03PA8KVkesMpwtL3KwW0Z5gYeKstH5ll7FBKEB6 Q+Qo5mHnPn+fyDJLrga0KRCo+CNAIwve6R/TrHw7cCImbjWpzQ/Z28J/b5TCw0Q8BKKF jtRSM/bxhhGTU2BO04IixUK9TdxYWGBOciX9F507SgzBd/UXeAOGWmWRLwBBizXmXjr9 iZFQ== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1OAA2UMf2MwPVblcdY=" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.39.0 DYNA|AUTH) with ESMTPSA id L29417y1CEJTsqS (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Sat, 12 Feb 2022 15:19:29 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie , Andrzej Hajda , Kieran Bingham Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org, Ezequiel Garcia Subject: [PATCH v14 1/9] drm/ingenic: Add support for JZ4780 and HDMI output Date: Sat, 12 Feb 2022 15:19:19 +0100 Message-Id: <31eff2819f94fefcb01aa5cb23c79ccf302d9238.1644675566.git.hns@goldelico.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Boddie Add support for the LCD controller present on JZ4780 SoCs. This SoC uses 8-byte descriptors which extend the current 4-byte descriptors used for other Ingenic SoCs. Note that plane f0 is not working and disabled to be seen from user-space. Tested on MIPS Creator CI20 board. Signed-off-by: Paul Boddie Signed-off-by: Ezequiel Garcia Signed-off-by: H. Nikolaus Schaller --- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c index 7f10d6eed549d..dcf44cb00821f 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c @@ -65,8 +65,10 @@ struct ingenic_dma_hwdescs { struct jz_soc_info { bool needs_dev_clk; bool has_osd; + bool has_alpha; bool map_noncoherent; bool use_extended_hwdesc; + bool plane_f0_not_working; unsigned int max_width, max_height; const u32 *formats_f0, *formats_f1; unsigned int num_formats_f0, num_formats_f1; @@ -453,7 +455,7 @@ static int ingenic_drm_plane_atomic_check(struct drm_plane *plane, if (!crtc) return 0; - if (plane == &priv->f0) + if (priv->soc_info->plane_f0_not_working && plane == &priv->f0) return -EINVAL; crtc_state = drm_atomic_get_existing_crtc_state(state, @@ -1055,6 +1057,7 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) long parent_rate; unsigned int i, clone_mask = 0; int ret, irq; + u32 osdc = 0; soc_info = of_device_get_match_data(dev); if (!soc_info) { @@ -1312,7 +1315,10 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) /* Enable OSD if available */ if (soc_info->has_osd) - regmap_write(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_OSDEN); + osdc |= JZ_LCD_OSDC_OSDEN; + if (soc_info->has_alpha) + osdc |= JZ_LCD_OSDC_ALPHAEN; + regmap_write(priv->map, JZ_REG_LCD_OSDC, osdc); mutex_init(&priv->clk_mutex); priv->clock_nb.notifier_call = ingenic_drm_update_pixclk; @@ -1511,7 +1517,9 @@ static const struct jz_soc_info jz4770_soc_info = { static const struct jz_soc_info jz4780_soc_info = { .needs_dev_clk = true, .has_osd = true, + .has_alpha = true, .use_extended_hwdesc = true, + .plane_f0_not_working = true, /* REVISIT */ .max_width = 4096, .max_height = 2048, .formats_f1 = jz4770_formats_f1,