@@ -715,6 +715,7 @@ config SGI_IP27
select PCI_DRIVERS_GENERIC
select PCI_XTALK_BRIDGE
select SYS_HAS_CPU_R10000
+ select SYS_HAS_CPU_R12K_R14K_R16K
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_NUMA
@@ -776,6 +777,7 @@ config SGI_IP30
select PCI_XTALK_BRIDGE
select SYS_HAS_EARLY_PRINTK
select SYS_HAS_CPU_R10000
+ select SYS_HAS_CPU_R12K_R14K_R16K
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_SMP
@@ -802,6 +804,7 @@ config SGI_IP32
select RM7000_CPU_SCACHE
select SYS_HAS_CPU_R5000
select SYS_HAS_CPU_R10000 if BROKEN
+ select SYS_HAS_CPU_R12K_R14K_R16K if BROKEN
select SYS_HAS_CPU_RM7000
select SYS_HAS_CPU_NEVADA
select SYS_SUPPORTS_64BIT_KERNEL
@@ -1722,8 +1725,19 @@ config CPU_R10000
select CPU_SUPPORTS_HIGHMEM
select CPU_SUPPORTS_HUGEPAGES
help
- MIPS Technologies R10000-series processors.
+ MIPS Technologies R10000 processor.
+config CPU_R12K_R14K_R16K
+ bool "R12k/R14k/R16k"
+ depends on SYS_HAS_CPU_R12K_R14K_R16K
+ select CPU_HAS_PREFETCH
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_SUPPORTS_64BIT_KERNEL
+ select CPU_SUPPORTS_HIGHMEM
+ select CPU_SUPPORTS_HUGEPAGES
+ help
+ MIPS Technologies R12000, R14000, & R16000 processors.
+
config CPU_RM7000
bool "RM7000"
depends on SYS_HAS_CPU_RM7000
@@ -2014,6 +2028,9 @@ config SYS_HAS_CPU_R10000
bool
select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
+config SYS_HAS_CPU_R12K_R14K_R16K
+ bool
+
config SYS_HAS_CPU_RM7000
bool
@@ -2752,7 +2769,7 @@ config NODES_SHIFT
config HW_PERF_EVENTS
bool "Enable hardware performance counter support for perf events"
- depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
+ depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_R12K_R14K_R16K || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
default y
help
Enable hardware performance counter support for perf events. If
@@ -188,6 +188,9 @@ cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-mno-mdmx)
cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-mno-mips3d)
cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
-Wa,--trap
+cflags-$(CONFIG_CPU_R12K_R14K_R16K) += $(call cc-option,-march=r12000,-march=r10000) \
+ $(call cc-option,-mno-fix-r10000,) \
+ -Wa,--trap
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += $(call cc-option,-march=octeon) -Wa,--trap
ifeq (,$(findstring march=octeon, $(cflags-$(CONFIG_CPU_CAVIUM_OCTEON))))
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -Wa,-march=octeon
@@ -148,6 +148,8 @@ static inline int __pure __get_cpu_type(const int cpu_type)
#ifdef CONFIG_SYS_HAS_CPU_R10000
case CPU_R10000:
+#endif
+#ifdef CONFIG_SYS_HAS_CPU_R12K_R14K_R16K
case CPU_R12000:
case CPU_R14000:
case CPU_R16000:
@@ -159,7 +159,8 @@ do { \
#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
defined(CONFIG_CPU_LOONGSON2EF) || defined(CONFIG_CPU_LOONGSON64) || \
- defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_XLR)
+ defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R12K_R14K_R16K) || \
+ defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_XLR)
/*
* R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
@@ -17,7 +17,12 @@
#define MIPS_CACHE_SYNC_WAR 0
#define TX49XX_ICACHE_INDEX_INV_WAR 0
#define ICACHE_REFILLS_WORKAROUND_WAR 0
-#define R10000_LLSC_WAR 1
#define MIPS34K_MISSED_ITLB_WAR 0
+#ifdef CONFIG_CPU_R10000
+#define R10000_LLSC_WAR 1
+#else
+#define R10000_LLSC_WAR 0
+#endif
+
#endif /* __ASM_MIPS_MACH_IP27_WAR_H */
@@ -115,6 +115,8 @@ search_module_dbetables(unsigned long addr)
#define MODULE_PROC_FAMILY "NEVADA "
#elif defined CONFIG_CPU_R10000
#define MODULE_PROC_FAMILY "R10000 "
+#elif defined CONFIG_CPU_R12K_R14K_R16K
+#define MODULE_PROC_FAMILY "R12K/R14K/R16K "
#elif defined CONFIG_CPU_RM7000
#define MODULE_PROC_FAMILY "RM7000 "
#elif defined CONFIG_CPU_SB1
@@ -12,6 +12,7 @@ oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_R10000) += op_model_mipsxx.o
+oprofile-$(CONFIG_CPU_R12K_R14K_R16K) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_SB1) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_XLR) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_LOONGSON2EF) += op_model_loongson2.o
@@ -6,14 +6,15 @@
# be 16kb aligned or the handling of the current variable will break.
#
ifdef CONFIG_SGI_IP27
-platform-$(CONFIG_SGI_IP27) += sgi-ip27/
-cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27
+platform-$(CONFIG_SGI_IP27) += sgi-ip27/
+cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27
+cflags-$(CONFIG_CPU_R12K_R14K_R16K) += -mno-fix-r10000
ifdef CONFIG_MAPPED_KERNEL
-load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
-OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
-dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
+load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
+OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
+dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
else
-load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
-OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
+load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
+OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
endif
endif
@@ -4,5 +4,7 @@
ifdef CONFIG_SGI_IP30
platform-$(CONFIG_SGI_IP30) += sgi-ip30/
cflags-$(CONFIG_SGI_IP30) += -I$(srctree)/arch/mips/include/asm/mach-ip30
+cflags-$(CONFIG_CPU_R12K_R14K_R16K) += -mno-fix-r10000
+#load-$(CONFIG_SGI_IP30) += 0xa800000020080000
load-$(CONFIG_SGI_IP30) += 0xa800000020004000
endif
@@ -8,4 +8,6 @@
#
platform-$(CONFIG_SGI_IP32) += sgi-ip32/
cflags-$(CONFIG_SGI_IP32) += -I$(srctree)/arch/mips/include/asm/mach-ip32
+cflags-$(CONFIG_CPU_R10000) += -mr10k-cache-barrier=load-store
+cflags-$(CONFIG_CPU_R12K_R14K_R16K) += -mno-fix-r10000 -mr10k-cache-barrier=load-store
load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
@@ -43,7 +43,7 @@ struct gbefb_par {
/* macro for fastest write-though access to the framebuffer */
#ifdef CONFIG_MIPS
-#ifdef CONFIG_CPU_R10000
+#if defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R12K_R14K_R16K)
#define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_UNCACHED_ACCELERATED)
#else
#define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_CACHABLE_NO_WA)
The attached patch adds more-specific support for R12000 and higher CPUs by splitting the R10000 logic at several places. This avoids the workarounds enabled by R10000_LLSC_WAR and passes -mno-fix-r10000 to gcc during the kernel compile. Signed-off-by: Joshua Kinard <kumba@gentoo.org> --- arch/mips/Kconfig | 21 +++++++++++++++++++-- arch/mips/Makefile | 3 +++ arch/mips/include/asm/cpu-type.h | 2 ++ arch/mips/include/asm/hazards.h | 3 ++- arch/mips/include/asm/mach-ip27/war.h | 7 ++++++- arch/mips/include/asm/module.h | 2 ++ arch/mips/oprofile/Makefile | 1 + arch/mips/sgi-ip27/Platform | 15 ++++++++------- arch/mips/sgi-ip30/Platform | 2 ++ arch/mips/sgi-ip32/Platform | 2 ++ drivers/video/fbdev/gbefb.c | 2 +- 11 files changed, 48 insertions(+), 12 deletions(-)