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[v3,2/3] MIPS: SGI-IP30: Remove R5432_CP0_INTERRUPT_WAR from war.h

Message ID e1c9ab69e73e7acc2d9c1c4f7d0b299a15e5a936.1589753297.git.kumba@gentoo.org (mailing list archive)
State Accepted
Headers show
Series [v3,1/3] MIPS: Split R10000 to allow for R12K+ optimizations | expand

Commit Message

Joshua Kinard May 17, 2020, 11:24 p.m. UTC 
From: Joshua Kinard <kumba@gentoo.org>

Remove an old macro that no longer exists anywhere else in the tree
that snuck in when IP30 support was added

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
---
 arch/mips/include/asm/mach-ip30/war.h | 1 -
 1 file changed, 1 deletion(-)
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Patch

diff --git a/arch/mips/include/asm/mach-ip30/war.h b/arch/mips/include/asm/mach-ip30/war.h
index a98ba204f183..ad3352d3d203 100644
--- a/arch/mips/include/asm/mach-ip30/war.h
+++ b/arch/mips/include/asm/mach-ip30/war.h
@@ -13,7 +13,6 @@ 
 #define SIBYTE_1956_WAR			0
 #define MIPS4K_ICACHE_REFILL_WAR	0
 #define MIPS34K_MISSED_ITLB_WAR		0
-#define R5432_CP0_INTERRUPT_WAR		0
 #define TX49XX_ICACHE_INDEX_INV_WAR	0
 #define ICACHE_REFILLS_WORKAROUND_WAR	0