From patchwork Tue Apr 14 17:02:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11488709 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ABC1F14DD for ; Tue, 14 Apr 2020 17:04:20 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 6F5ED2075E for ; Tue, 14 Apr 2020 17:04:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NEj+O1VP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6F5ED2075E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id A3F068E000E; Tue, 14 Apr 2020 13:04:19 -0400 (EDT) Delivered-To: linux-mm-outgoing@kvack.org Received: by kanga.kvack.org (Postfix, from userid 40) id 9C89B8E0001; Tue, 14 Apr 2020 13:04:19 -0400 (EDT) X-Original-To: int-list-linux-mm@kvack.org X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 8B7528E000E; Tue, 14 Apr 2020 13:04:19 -0400 (EDT) X-Original-To: linux-mm@kvack.org X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0036.hostedemail.com [216.40.44.36]) by kanga.kvack.org (Postfix) with ESMTP id 6D6428E0001 for ; Tue, 14 Apr 2020 13:04:19 -0400 (EDT) Received: from smtpin09.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id 2CAC0824556B for ; Tue, 14 Apr 2020 17:04:19 +0000 (UTC) X-FDA: 76707083838.09.cause56_7cf7072b4c802 X-Spam-Summary: 10,1,0,df48869ab918a4c4,d41d8cd98f00b204,jean-philippe@linaro.org,,RULES_HIT:41:334:355:368:369:379:541:800:967:968:973:982:988:989:1260:1311:1314:1345:1437:1515:1535:1543:1711:1730:1747:1777:1792:1801:1981:2194:2198:2199:2200:2376:2393:2525:2559:2564:2682:2685:2859:2895:2903:2911:2933:2937:2939:2942:2945:2947:2951:2954:3022:3138:3139:3140:3141:3142:3355:3865:3866:3867:3868:3870:3871:3872:3874:3934:3936:3938:3941:3944:3947:3950:3953:3956:3959:4118:4250:4321:4425:4605:5007:6119:6261:6653:6742:6755:7903:8985:9025:9509:10004:11026:11658:11914:12043:12048:12050:12219:12297:12438:12517:12519:12555:12663:12679:12895:12986:13161:13229:13894:13972:14096:14181:14394:14721:21080:21213:21220:21222:21433:21444:21451:21627:21749:21796:21811:21891:21987:30003:30036:30045:30054:30070:30074:30089,0,RBL:209.85.128.68:@linaro.org:.lbl8.mailshell.net-66.201.201.201 62.14.0.100,CacheIP:none,Bayesian:0.5,0.5,0.5,Netcheck:none,DomainCache:0,MSF:not bulk,SPF:ft,MSBL:0,DNSBL:neutral, Custom_r X-HE-Tag: cause56_7cf7072b4c802 X-Filterd-Recvd-Size: 7006 Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by imf31.hostedemail.com (Postfix) with ESMTP for ; Tue, 14 Apr 2020 17:04:18 +0000 (UTC) Received: by mail-wm1-f68.google.com with SMTP id a81so14892450wmf.5 for ; Tue, 14 Apr 2020 10:04:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=fDR92FG/W9XzyoEKCk0ZF8N6Phe9WGPiX+0dpA5beXc=; b=NEj+O1VPlDE3+b9GRhqJpb7imwatVrbEHRPijSau+X9Vbg+US5qIqjILEeTsiMZyzd Jbi8pl9C2UJZk5wt+F2ohcMMgOlmn6vRXNL+oLg3PX1OQyFq5Vi7QeyaSHWpCnKH9wwW BQcMuKVX1Kxci3T4tlG5aUlteOmxPqpT3W6wO26dWN/t7wdHaxqmgBUfDWUgwMMU2ufA pOJXldxAAh12JJAT7GYE/YQAYLgMhCdkm9Y3ZNUlaySCcDtsLm5njdvcwhqHN+ekOPfb 7Kguikc/vkv7QzJrcpWobUk53WblaNZeBLUQoi01vtQvlCASM3Ery/NF+KrJ8hZbl8nn tsaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=fDR92FG/W9XzyoEKCk0ZF8N6Phe9WGPiX+0dpA5beXc=; b=KaIkoKPBxKZbJLlBpqcwUbxF4i4L0tMiPLfayvaFWRtO/vcg23QtHSQgxhWuj73Wq5 5XVsMSd3IsgCxhkVCj1cbAuqBOpf9oO4iI0+qUcsRs2YqFVaEJsL9LD/YyEAxPPkB4Gv RqMuYPLK11O9HnklYh4MjWd8H1klx93aa8/DUq/XLK3TGjo/z4L+6ZeaDHBedfqRFpN6 ih/A6TsFYuH07Rwsw2OWmtFZAC5ZGhRX/5khTFxY+c+n9qjKr+uCwXp5Qn/Mhbzh27hF NkdXCpXLdvUcEdxr8GlXkwvCSEJTcC9R1q3Iex9az/Q8EfdBkfNC/itVbjZfeYN5kyGs SWZA== X-Gm-Message-State: AGi0PuaXfQbANxQnLW5h57ORIAc1yEWcryo/1tRHkCQMahbMoOGotdie w5pu8H54PvV+rt8aOaMuJn7Xzg== X-Google-Smtp-Source: APiQypIdArRSrPXSdknP2IMK7ppxpSO4QpwtmnnSeA+CSALQDIlf3m4G7fjFu80JrmrhRYEK5Otokw== X-Received: by 2002:a1c:4e16:: with SMTP id g22mr723817wmh.157.1586883857511; Tue, 14 Apr 2020 10:04:17 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:226b:54a0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id x18sm19549147wrs.11.2020.04.14.10.04.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2020 10:04:16 -0700 (PDT) From: Jean-Philippe Brucker To: iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-mm@kvack.org Cc: joro@8bytes.org, catalin.marinas@arm.com, will@kernel.org, robin.murphy@arm.com, kevin.tian@intel.com, baolu.lu@linux.intel.com, Jonathan.Cameron@huawei.com, jacob.jun.pan@linux.intel.com, christian.koenig@amd.com, zhangfei.gao@linaro.org, jgg@ziepe.ca, xuzaibo@huawei.com, Jean-Philippe Brucker Subject: [PATCH v5 00/25] iommu: Shared Virtual Addressing and SMMUv3 support Date: Tue, 14 Apr 2020 19:02:28 +0200 Message-Id: <20200414170252.714402-1-jean-philippe@linaro.org> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Shared Virtual Addressing (SVA) allows to share process page tables with devices using the IOMMU. Add a generic implementation of the IOMMU SVA API, and add support in the Arm SMMUv3 driver. Since v4 [1] I changed the PASID lifetime. It isn't released when the corresponding process address space dies, but when the device driver calls unbind. This alleviates the mmput() path as we don't need to ensure that the device driver stops DMA there anymore. For more details see my proposal from last week [2], which is a requirement for this series. As a result patch 1 has separate clear() and detach() operations, and patch 17 has a new context descriptor state. Other changes are a simplification of the locking in patch 1 and overall cleanups following review comments. [1] [PATCH v4 00/26] iommu: Shared Virtual Addressing and SMMUv3 support https://lore.kernel.org/linux-iommu/20200224182401.353359-1-jean-philippe@linaro.org/ [2] [PATCH 0/2] iommu: Remove iommu_sva_ops::mm_exit() https://lore.kernel.org/linux-iommu/20200408140427.212807-1-jean-philippe@linaro.org/ Jean-Philippe Brucker (25): mm/mmu_notifiers: pass private data down to alloc_notifier() iommu/sva: Manage process address spaces iommu: Add a page fault handler iommu/sva: Search mm by PASID iommu/iopf: Handle mm faults iommu/sva: Register page fault handler arm64: mm: Add asid_gen_match() helper arm64: mm: Pin down ASIDs for sharing mm with devices iommu/io-pgtable-arm: Move some definitions to a header iommu/arm-smmu-v3: Manage ASIDs with xarray arm64: cpufeature: Export symbol read_sanitised_ftr_reg() iommu/arm-smmu-v3: Share process page tables iommu/arm-smmu-v3: Seize private ASID iommu/arm-smmu-v3: Add support for VHE iommu/arm-smmu-v3: Enable broadcast TLB maintenance iommu/arm-smmu-v3: Add SVA feature checking iommu/arm-smmu-v3: Implement mm operations iommu/arm-smmu-v3: Hook up ATC invalidation to mm ops iommu/arm-smmu-v3: Add support for Hardware Translation Table Update iommu/arm-smmu-v3: Maintain a SID->device structure dt-bindings: document stall property for IOMMU masters iommu/arm-smmu-v3: Add stall support for platform devices PCI/ATS: Add PRI stubs PCI/ATS: Export PRI functions iommu/arm-smmu-v3: Add support for PRI drivers/iommu/Kconfig | 13 + drivers/iommu/Makefile | 2 + .../devicetree/bindings/iommu/iommu.txt | 18 + arch/arm64/include/asm/mmu.h | 1 + arch/arm64/include/asm/mmu_context.h | 11 +- drivers/iommu/io-pgtable-arm.h | 30 + drivers/iommu/iommu-sva.h | 78 + include/linux/iommu.h | 75 + include/linux/mmu_notifier.h | 11 +- include/linux/pci-ats.h | 8 + arch/arm64/kernel/cpufeature.c | 1 + arch/arm64/mm/context.c | 103 +- drivers/iommu/arm-smmu-v3.c | 1398 +++++++++++++++-- drivers/iommu/io-pgfault.c | 525 +++++++ drivers/iommu/io-pgtable-arm.c | 27 +- drivers/iommu/iommu-sva.c | 557 +++++++ drivers/iommu/iommu.c | 1 + drivers/iommu/of_iommu.c | 5 +- drivers/misc/sgi-gru/grutlbpurge.c | 5 +- drivers/pci/ats.c | 4 + mm/mmu_notifier.c | 6 +- 21 files changed, 2716 insertions(+), 163 deletions(-) create mode 100644 drivers/iommu/io-pgtable-arm.h create mode 100644 drivers/iommu/iommu-sva.h create mode 100644 drivers/iommu/io-pgfault.c create mode 100644 drivers/iommu/iommu-sva.c