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Fri, 12 Mar 2021 08:39:15 +0000 From: Alistair Popple To: , , , CC: , , , , , , , , , , , Alistair Popple Subject: [PATCH v6 0/8] Add support for SVM atomics in Nouveau Date: Fri, 12 Mar 2021 19:38:43 +1100 Message-ID: <20210312083851.15981-1-apopple@nvidia.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d8abfa89-2664-4c41-5c62-08d8e532521c X-MS-TrafficTypeDiagnostic: CH2PR12MB4117: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Jw0uqvtIXSGnoAv/4npDgMlK6d+lX4g4KZXDrOdqztco/WXI4kktH6rRY7a6l6f8Enu8b+EsxVcPPbsvspHCaBITAWJAA5yufzUjcPYsLDUcioUj/y9KXR6ev6nPS0kY1p9DjcQXxzwkOZnW77t/SNBb8XyRh2qycaCdDT1gG1h+XfPwBhDKopM9+/02W2ql5V1oAyPWwPimK+6eC+ao4T5ypYT3wki0C6cOmDYHySMT+QAl+I9VLfWJbkbV8GOGQ3vKBsgNXWxXsNgxhIFN4bCXutD5i3D2nnjVf/E0EBHtSYpeU1VV1OR9L+oGQ8hKx3AmbbIYRU3Le7cI+vRYeHOoCRyf8scvhf67Jfnt+F7wiq0A63SNPnw2XuqWRjJXMItc7JMV+SxpGCQl3BMmF0NBHyBBHohZGOfXxzgBQPMa8GRMYenSLftuYq2bFw+DtW6eoBfczelESfOJQH1swgctzoJCaHubjcgIja+PzPOA4S0nWhd055Usjvfluf1JIzmbkFrR/e0ZIa+uCsfnGncPoDsRX4X+iBZMRLB10yQZxUpWUe0WE8EbOQBBfwqldiHb/sod/29O6IvhYHnEL6Rx7S87Yi6weas120bmABDuncCoAmaa7ulCFfXBpgbUMzbN0bSSOthHLra2DJT6yXOYgpMZBxT2dQ0thLawlx12HuI1VzDa8fOKH1CTyLH0 X-Forefront-Antispam-Report: CIP:216.228.112.34;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid03.nvidia.com;CAT:NONE;SFS:(4636009)(136003)(346002)(39860400002)(396003)(376002)(36840700001)(46966006)(70206006)(70586007)(16526019)(26005)(186003)(2906002)(36860700001)(336012)(86362001)(7416002)(426003)(2616005)(47076005)(478600001)(34020700004)(8676002)(6666004)(4326008)(36906005)(54906003)(316002)(36756003)(356005)(83380400001)(5660300002)(110136005)(1076003)(107886003)(7636003)(82310400003)(82740400003)(8936002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2021 08:39:16.0481 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8abfa89-2664-4c41-5c62-08d8e532521c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4117 X-Stat-Signature: 5yo99rmamdbwntujemehu96ms4ckdr39 X-Rspamd-Server: rspam01 X-Rspamd-Queue-Id: 026C6200038C Received-SPF: none (nvidia.com>: No applicable sender policy available) receiver=imf18; identity=mailfrom; envelope-from=""; helo=NAM02-BL2-obe.outbound.protection.outlook.com; client-ip=40.107.75.78 X-HE-DKIM-Result: pass/pass X-HE-Tag: 1615538360-294276 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: This is the sixth version of a series to add support to Nouveau for atomic memory operations on OpenCL shared virtual memory (SVM) regions. There are no significant changes for version six other than correcting a minor s390 build and bisectability issue and removing a redundant call to compound_page() when checking for PageLocked in patch 1. Exclusive device access is implemented by adding a new swap entry type (SWAP_DEVICE_EXCLUSIVE) which is similar to a migration entry. The main difference is that on fault the original entry is immediately restored by the fault handler instead of waiting. Restoring the entry triggers calls to MMU notifers which allows a device driver to revoke the atomic access permission from the GPU prior to the CPU finalising the entry. Patches 1 & 2 refactor existing migration and device private entry functions. Patches 3 & 4 rework try_to_unmap_one() by splitting out unrelated functionality into separate functions - try_to_migrate_one() and try_to_munlock_one(). These should not change any functionality, but any help testing would be much appreciated as I have not been able to test every usage of try_to_unmap_one(). Patch 5 contains the bulk of the implementation for device exclusive memory. Patch 6 contains some additions to the HMM selftests to ensure everything works as expected. Patch 7 is a cleanup for the Nouveau SVM implementation. Patch 8 contains the implementation of atomic access for the Nouveau driver. This has been tested using the latest upstream Mesa userspace with a simple OpenCL test program which checks the results of atomic GPU operations on a SVM buffer whilst also writing to the same buffer from the CPU. Alistair Popple (8): mm: Remove special swap entry functions mm/swapops: Rework swap entry manipulation code mm/rmap: Split try_to_munlock from try_to_unmap mm/rmap: Split migration into its own function mm: Device exclusive memory access mm: Selftests for exclusive device memory nouveau/svm: Refactor nouveau_range_fault nouveau/svm: Implement atomic SVM access Documentation/vm/hmm.rst | 19 +- arch/s390/mm/pgtable.c | 2 +- drivers/gpu/drm/nouveau/include/nvif/if000c.h | 1 + drivers/gpu/drm/nouveau/nouveau_svm.c | 130 +++- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 1 + .../drm/nouveau/nvkm/subdev/mmu/vmmgp100.c | 6 + fs/proc/task_mmu.c | 23 +- include/linux/mmu_notifier.h | 25 +- include/linux/rmap.h | 9 +- include/linux/swap.h | 8 +- include/linux/swapops.h | 123 ++-- lib/test_hmm.c | 126 +++- lib/test_hmm_uapi.h | 2 + mm/debug_vm_pgtable.c | 12 +- mm/hmm.c | 12 +- mm/huge_memory.c | 45 +- mm/hugetlb.c | 10 +- mm/memcontrol.c | 2 +- mm/memory.c | 127 +++- mm/migrate.c | 41 +- mm/mprotect.c | 18 +- mm/page_vma_mapped.c | 15 +- mm/rmap.c | 597 +++++++++++++++--- tools/testing/selftests/vm/hmm-tests.c | 219 +++++++ 24 files changed, 1313 insertions(+), 260 deletions(-)