From patchwork Tue Mar 1 08:53:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Ying" X-Patchwork-Id: 12764362 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65B4EC433EF for ; Tue, 1 Mar 2022 08:53:45 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 058578D0002; Tue, 1 Mar 2022 03:53:45 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 0083E8D0001; Tue, 1 Mar 2022 03:53:44 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E39638D0002; Tue, 1 Mar 2022 03:53:44 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0133.hostedemail.com [216.40.44.133]) by kanga.kvack.org (Postfix) with ESMTP id D64E28D0001 for ; Tue, 1 Mar 2022 03:53:44 -0500 (EST) Received: from smtpin23.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay04.hostedemail.com (Postfix) with ESMTP id 98F9196F34 for ; Tue, 1 Mar 2022 08:53:44 +0000 (UTC) X-FDA: 79195204368.23.42C7CE7 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by imf03.hostedemail.com (Postfix) with ESMTP id 87FFA20004 for ; Tue, 1 Mar 2022 08:53:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1646124823; x=1677660823; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=OKAx0mpfM0tACch330a5GLxXLRTDoojkwcWwxpc/s3c=; b=HlLRWryNdABDfLpESSE8eN6S8KgI/9Iw3Kp+Gi7P/9wl0359ZDEk1RSm s4TTC3mehlkYd3gRF1HatUV52omslpi19ODNgtpAykNYqd5XpsdET63Xg DRDlH539pTGORKaTN0uHjlMUJPQNueiiGFMqev2Zz0QHPTgWry23rNJrB wuB/NIOpY9lj+dw9QLO7d+AY99w3etIKxKeBseiBzVtkKx5Mhld3G6s6w 2Pbs2YoE7GilisZulBuFDZOkFjqPqbkJ6aLQQRb/zwFFDhccyLm6xXXbz MamK0r7bu2y1WF5HT18hEpYQiLGAPkW5XvqVB16KliT7E6tPbj2hcVQDu A==; X-IronPort-AV: E=McAfee;i="6200,9189,10272"; a="251922042" X-IronPort-AV: E=Sophos;i="5.90,145,1643702400"; d="scan'208";a="251922042" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Mar 2022 00:53:41 -0800 X-IronPort-AV: E=Sophos;i="5.90,145,1643702400"; d="scan'208";a="550627066" Received: from yhuang6-desk2.sh.intel.com ([10.239.13.11]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Mar 2022 00:53:37 -0800 From: Huang Ying To: Peter Zijlstra , Mel Gorman , Andrew Morton Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, Feng Tang , Huang Ying , Michal Hocko , Rik van Riel , Dave Hansen , Yang Shi , Zi Yan , Wei Xu , Oscar Salvador , Shakeel Butt , Johannes Weiner Subject: [PATCH -V14 0/3] NUMA balancing: optimize memory placement for memory tiering system Date: Tue, 1 Mar 2022 16:53:26 +0800 Message-Id: <20220301085329.3210428-1-ying.huang@intel.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 87FFA20004 X-Stat-Signature: j4ky784x7eyh8rkpmmoe5rngjh5ewiii Authentication-Results: imf03.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=HlLRWryN; spf=none (imf03.hostedemail.com: domain of ying.huang@intel.com has no SPF policy when checking 192.55.52.120) smtp.mailfrom=ying.huang@intel.com; dmarc=pass (policy=none) header.from=intel.com X-HE-Tag: 1646124823-673756 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: The changes since the last post are as follows, - Improved the patch description of [2/3] per Oscar's comments. Thanks! - Added Oscar's Reviewed-by for [2/3] and [3/3]. --- With the advent of various new memory types, some machines will have multiple types of memory, e.g. DRAM and PMEM (persistent memory). The memory subsystem of these machines can be called memory tiering system, because the performance of the different types of memory are different. After commit c221c0b0308f ("device-dax: "Hotplug" persistent memory for use like normal RAM"), the PMEM could be used as the cost-effective volatile memory in separate NUMA nodes. In a typical memory tiering system, there are CPUs, DRAM and PMEM in each physical NUMA node. The CPUs and the DRAM will be put in one logical node, while the PMEM will be put in another (faked) logical node. To optimize the system overall performance, the hot pages should be placed in DRAM node. To do that, we need to identify the hot pages in the PMEM node and migrate them to DRAM node via NUMA migration. In the original NUMA balancing, there are already a set of existing mechanisms to identify the pages recently accessed by the CPUs in a node and migrate the pages to the node. So we can reuse these mechanisms to build the mechanisms to optimize the page placement in the memory tiering system. This is implemented in this patchset. At the other hand, the cold pages should be placed in PMEM node. So, we also need to identify the cold pages in the DRAM node and migrate them to PMEM node. In commit 26aa2d199d6f ("mm/migrate: demote pages during reclaim"), a mechanism to demote the cold DRAM pages to PMEM node under memory pressure is implemented. Based on that, the cold DRAM pages can be demoted to PMEM node proactively to free some memory space on DRAM node to accommodate the promoted hot PMEM pages. This is implemented in this patchset too. We have tested the solution with the pmbench memory accessing benchmark with the 80:20 read/write ratio and the Gauss access address distribution on a 2 socket Intel server with Optane DC Persistent Memory Model. The test results shows that the pmbench score can improve up to 95.9%. Changelog: v14: - Improved the patch description of [2/3] per Oscar's comments. Thanks! - Added Oscar's Reviewed-by for [2/3] and [3/3]. v13: - Fix nr_succeeded type in migrate_misplaced_page per Oscar's comments. - Make NUMA_BALANCING_MEMORY_TIERING works independent of demotion knob per Johannes' comments. v12: - Rebased on v5.17-rc4 - Change promotion watermark implementation per Johannes' comments - Fixed several sysctl ABI document bugs, Thanks Andrew. v11: - Rebased on v5.17-rc1 - Remove [4-6] from the original patchset to make it easier to be reviewed. - Change the additional promotion watermark to be the high watermark / 4. v10: - Rebased on v5.16-rc1 - Revise error processing for [1/6] (promotion counter) per Yang's comments - Add sysctl document for [2/6] (optimize page placement) - Reset threshold adjustment state when disable/enable tiering mode - Reset threshold when workload transition is detected. v9: - Rebased on v5.15-rc4 - Make "add promotion counter" the first patch per Yang's comments v8: - Rebased on v5.15-rc1 - Make user-specified threshold take effect sooner v7: - Rebased on the mmots tree of 2021-07-15. - Some minor fixes. v6: - Rebased on the latest page demotion patchset. (which bases on v5.11) v5: - Rebased on the latest page demotion patchset. (which bases on v5.10) v4: - Rebased on the latest page demotion patchset. (which bases on v5.9-rc6) - Add page promotion counter. v3: - Move the rate limit control as late as possible per Mel Gorman's comments. - Revise the hot page selection implementation to store page scan time in struct page. - Code cleanup. - Rebased on the latest page demotion patchset. v2: - Addressed comments for V1. - Rebased on v5.5. Best Regards, Huang, Ying