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Wed, 15 Nov 2023 08:30:29 -0800 (PST) From: Ryan Roberts To: Catalin Marinas , Will Deacon , Ard Biesheuvel , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Andrew Morton , Anshuman Khandual , Matthew Wilcox , Yu Zhao , Mark Rutland , David Hildenbrand , Kefeng Wang , John Hubbard , Zi Yan Cc: Ryan Roberts , linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 00/14] Transparent Contiguous PTEs for User Mappings Date: Wed, 15 Nov 2023 16:30:04 +0000 Message-Id: <20231115163018.1303287-1-ryan.roberts@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 069F11C000F X-Stat-Signature: az9psdkdbmoj1qb43m5u35y9ibos4mcw X-HE-Tag: 1700065833-770738 X-HE-Meta: U2FsdGVkX1+bGOi2QkTSAqY8tfHUuZj0RySbgLlg1ewa1pR/mHTx5NdEn2YUGuR/DVh7EH6xif6FZP8+zA6hOhh65HPBNGOUf+SAshOEkf45PSXlPrgpWfRk8PuM9vvkFoFZ3j58SUz/x9A6m+QAlp2GbXl3jMdVriN8gdZ60TvXNuVH8iO3qvl2CWxfxrKpKRsL1/E26/Q7qrlfFLwfsvtqwZeXDVaDAyFCjvWLtQg1IuwcU+T+Z0Bw86MfWwzQs6pMjA/XASooC8naCksB/SiAli4lwRBDzaFQhXZxB0lWTx1iAc8I64KZYdFLyTiksaMh9BX5Tsm9Y42B/CcqMNwQ7Y1b7001wHW5i9eTY7Q6EEgi2AKiwDCPxYbqHAeGiEClGNXS5ai/NZFlcmTf0wX1/wriamfAQ3JYzFyXEGoR3a8B47NqxaqokM37QdNbLj2P99Hu6XFWwDp5w5DFTFso0nCH3JpdZm7fz/qepW9lEYC3JQ6x1KMc8r384V7AP60YwVU8Pv8ypAwYA0qrOsyn9iI0WyV1eoNB5d/NuwYAU08Z/kdiwToJY7hNptPg1zfRKm7D3CPnLactoY6dtqiYvWCVe7i757P1e3A08Ek98KoRI4v+n0T0bqho6jmmHkHHKJUeIh0+PWxA+QU2MttDVNQ+/7XaME4V398ksFWy5fOZR49ZE5b7XwrRmvWawSucjr0yGOHxyl32+PRYx9eNR85b+l7qHK6tbHPwIHTBYwklGSU/3JWf0e6YnIdajl16vbbUCJjxy09QlTNPbveehpC+oIz1TvrZZqLZ0BzJf8VkoavdTT3OfdZp6yg0lCkhWKxFrIYdxnl1FUAvOvbmDIPu9C+ruh5yBZSixhckGxRrlYR/E2X2hy79LGAGI7FWyIlwGl2wCABO8tSzujCvvzq3LnT7cExSpUEdAEZTnvEB7H5TgdP7/sysOKtKcXES1igqp9SdYtGvsTn wO2HE/d5 gin+mHYNp98c47siXiIoov/guzotPe5KJlAfYENIPgle6rL+S1fROKpHur9Tya2h/zCWceENQVbAx2SR2GuqlD/EMZyJkW9gS5UI0Fsl5CaIBpLxWSNracqGuWTrAxBAUcG7YQuyEmY6w3agN2OXN/NxWjvIfgwqhL9lRrh2HFvMyOE9mUK33RpguEwv4fFtbkSWblY1pbT6yuTQZx+8UA/CG27pqLxds3iE5N1Wzio1W/g+TwVbcb/RGWJqNVqnsAfFEbWSj07zOJvh7up7vrKgyBnlRkGKU7VJ6VBbfouax4ZmUIjhDRx8nrg== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Hi All, This is v2 of a series to opportunistically and transparently use contpte mappings (set the contiguous bit in ptes) for user memory when those mappings meet the requirements. It is part of a wider effort to improve performance by allocating and mapping variable-sized blocks of memory (folios). One aim is for the 4K kernel to approach the performance of the 16K kernel, but without breaking compatibility and without the associated increase in memory. Another aim is to benefit the 16K and 64K kernels by enabling 2M THP, since this is the contpte size for those kernels. We have good performance data that demonstrates both aims are being met (see below). Of course this is only one half of the change. We require the mapped physical memory to be the correct size and alignment for this to actually be useful (i.e. 64K for 4K pages, or 2M for 16K/64K pages). Fortunately folios are solving this problem for us. Filesystems that support it (XFS, AFS, EROFS, tmpfs, ...) will allocate large folios up to the PMD size today, and more filesystems are coming. And the other half of my work, to enable "small-sized THP" (large folios) for anonymous memory, makes contpte sized folios prevalent for anonymous memory too [2]. Optimistically, I would really like to get this series merged for v6.8; there is a chance that the small-sized THP series will also get merged for that version. But even if it doesn't, this series still benefits file-backed memory from the file systems that support large folios so shouldn't be held up for it. Additionally I've got data that shows this series adds no regression when the system has no appropriate large folios. All dependecies listed against v1 are now resolved; This series applies cleanly against v6.7-rc1. Note that the first patch is for core-mm and provides the refactoring to make a crucial optimization possible - which is then implemented in patch 13. The remaining patches are arm64-specific. Testing ======= I've tested this series together with small-sized THP [2] on both Ampere Altra (bare metal) and Apple M2 (VM): - mm selftests (inc new tests written for small-sized THP); no regressions - Speedometer Java script benchmark in Chromium web browser; no issues - Kernel compilation; no issues - Various tests under high memory pressure with swap enabled; no issues Performance =========== John Hubbard at Nvidia has indicated dramatic 10x performance improvements for some workloads at [3], when using 64K base page kernel. You can also see the original performance results I posted against v1 [1] which are still valid. I've additionally run the kernel compilation and speedometer benchmarks on a system with small-sized THP disabled and large folio support for file-backed memory intentionally disabled; I see no change in performance in this case (i.e. no regression when this change is "present but not useful"). Changes since v1 ================ - Export contpte_* symbols so that modules can continue to call inline functions (e.g. ptep_get) which may now call the contpte_* functions (thanks to JohnH) - Use pte_valid() instead of pte_present() where sensible (thanks to Catalin) - Factor out (pte_valid() && pte_cont()) into new pte_valid_cont() helper (thanks to Catalin) - Fixed bug in contpte_ptep_set_access_flags() where TLBIs were missed (thanks to Catalin) - Added ARM64_CONTPTE expert Kconfig (enabled by default) (thanks to Anshuman) - Simplified contpte_ptep_get_and_clear_full() - Improved various code comments [1] https://lore.kernel.org/linux-arm-kernel/20230622144210.2623299-1-ryan.roberts@arm.com/ [2] https://lore.kernel.org/linux-arm-kernel/20231115132734.931023-1-ryan.roberts@arm.com/ [3] https://lore.kernel.org/linux-mm/c507308d-bdd4-5f9e-d4ff-e96e4520be85@nvidia.com/ Thanks, Ryan Ryan Roberts (14): mm: Batch-copy PTE ranges during fork() arm64/mm: set_pte(): New layer to manage contig bit arm64/mm: set_ptes()/set_pte_at(): New layer to manage contig bit arm64/mm: pte_clear(): New layer to manage contig bit arm64/mm: ptep_get_and_clear(): New layer to manage contig bit arm64/mm: ptep_test_and_clear_young(): New layer to manage contig bit arm64/mm: ptep_clear_flush_young(): New layer to manage contig bit arm64/mm: ptep_set_wrprotect(): New layer to manage contig bit arm64/mm: ptep_set_access_flags(): New layer to manage contig bit arm64/mm: ptep_get(): New layer to manage contig bit arm64/mm: Split __flush_tlb_range() to elide trailing DSB arm64/mm: Wire up PTE_CONT for user mappings arm64/mm: Implement ptep_set_wrprotects() to optimize fork() arm64/mm: Add ptep_get_and_clear_full() to optimize process teardown arch/arm64/Kconfig | 10 +- arch/arm64/include/asm/pgtable.h | 325 +++++++++++++++++++--- arch/arm64/include/asm/tlbflush.h | 13 +- arch/arm64/kernel/efi.c | 4 +- arch/arm64/kernel/mte.c | 2 +- arch/arm64/kvm/guest.c | 2 +- arch/arm64/mm/Makefile | 1 + arch/arm64/mm/contpte.c | 447 ++++++++++++++++++++++++++++++ arch/arm64/mm/fault.c | 12 +- arch/arm64/mm/fixmap.c | 4 +- arch/arm64/mm/hugetlbpage.c | 40 +-- arch/arm64/mm/kasan_init.c | 6 +- arch/arm64/mm/mmu.c | 16 +- arch/arm64/mm/pageattr.c | 6 +- arch/arm64/mm/trans_pgd.c | 6 +- include/linux/pgtable.h | 13 + mm/memory.c | 175 +++++++++--- 17 files changed, 956 insertions(+), 126 deletions(-) create mode 100644 arch/arm64/mm/contpte.c --- 2.25.1