From patchwork Tue Feb 4 17:33:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maciej Wieczor-Retman X-Patchwork-Id: 13959494 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6632C02193 for ; Tue, 4 Feb 2025 17:37:03 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 400A3280007; Tue, 4 Feb 2025 12:37:03 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 3B19E280006; Tue, 4 Feb 2025 12:37:03 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 2037E280007; Tue, 4 Feb 2025 12:37:03 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id F329B280006 for ; Tue, 4 Feb 2025 12:37:02 -0500 (EST) Received: from smtpin06.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id DA610120CC1 for ; Tue, 4 Feb 2025 17:36:56 +0000 (UTC) X-FDA: 83082967632.06.1F0C2CB Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by imf07.hostedemail.com (Postfix) with ESMTP id CF4B040012 for ; Tue, 4 Feb 2025 17:36:52 +0000 (UTC) Authentication-Results: imf07.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=lTyGKWCp; spf=pass (imf07.hostedemail.com: domain of maciej.wieczor-retman@intel.com designates 198.175.65.20 as permitted sender) smtp.mailfrom=maciej.wieczor-retman@intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1738690614; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=wcThim39EYPHxXLHIVD/RA5qpLaRNquzUdH4zXdFJ+w=; b=5cd3RpsBS3nDv58Jn4H0nQJmk252veQ1H9TXnXO8PCFB92pkT3CaEdGv7KTnScXxqrDgyt v4yFZTkrNP2/4ZiGGMDWG31u1d1/nfC8RZ8pi9F4T+dH2BUtvgnU8os3/rJQHroSUgg5Pv B9X76D8mr6CCjBowK92jvyOQm4kETEo= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1738690614; a=rsa-sha256; cv=none; b=POwomZ59uWT3gFbDTLaifkWX3x2qcjJ8LtXCdaWCrdykNADASS23EnOIcLKGdy1w2F5XT4 894veMXVdp74lHDYYdby7acinVvRx54jUbT/xYvfhlOP15G/FapnHXLbqOtRr0+z9XGia5 vWCia9237MbJJor9dO5BMVA1LaklRuQ= ARC-Authentication-Results: i=1; imf07.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=lTyGKWCp; spf=pass (imf07.hostedemail.com: domain of maciej.wieczor-retman@intel.com designates 198.175.65.20 as permitted sender) smtp.mailfrom=maciej.wieczor-retman@intel.com; dmarc=pass (policy=none) header.from=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738690614; x=1770226614; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EUgvSoD6ZXvZMdQY8EXK092WIVXF++/3+F17U+GxOWU=; b=lTyGKWCps+Gv8uBBObQvGrzpGKpend5mnXBqP/YOlCATUeIX6E/yXR8e iO7Jw2WaD8NLcFP2suUr888jgSK/5VSQ1dImzo7WyeTsb/l5yxAX7jzHY afHL0DgFVh3ZFvryBE3Q88iUqbw+AyaWwOn8v2sFutsPc4v17A/NcxzDV Y4ADOeiSTvCcbnhp2j8QUR4cPScpBnJ+FC8GZ0ACjf5YTPN8lh+D9EUp0 is7gk9N6H9zccswE1RbRdlXsQOSxy+zpM8kvEwFn7D6k/UxWrPxz/SjbD xG12PKuWrRUrdT+SkDk2t8yY32epiAp2dhknEy3cTpzn3A3qErVjwGrxZ w==; X-CSE-ConnectionGUID: 23dPVRDMRBu51+hzBR3J3A== X-CSE-MsgGUID: CHITLcQ0T4O3Gyxg2PICYw== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="38930987" X-IronPort-AV: E=Sophos;i="6.13,259,1732608000"; d="scan'208";a="38930987" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2025 09:36:51 -0800 X-CSE-ConnectionGUID: P6du7V6VScafjuMIXvnbWA== X-CSE-MsgGUID: W7s9nIAMS+GBPujRL+zY2g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="147866889" Received: from mjarzebo-mobl1.ger.corp.intel.com (HELO wieczorr-mobl1.intel.com) ([10.245.244.61]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2025 09:36:39 -0800 From: Maciej Wieczor-Retman To: luto@kernel.org, xin@zytor.com, kirill.shutemov@linux.intel.com, palmer@dabbelt.com, tj@kernel.org, andreyknvl@gmail.com, brgerst@gmail.com, ardb@kernel.org, dave.hansen@linux.intel.com, jgross@suse.com, will@kernel.org, akpm@linux-foundation.org, arnd@arndb.de, corbet@lwn.net, maciej.wieczor-retman@intel.com, dvyukov@google.com, richard.weiyang@gmail.com, ytcoode@gmail.com, tglx@linutronix.de, hpa@zytor.com, seanjc@google.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, justinstitt@google.com, jason.andryuk@amd.com, glider@google.com, ubizjak@gmail.com, jannh@google.com, bhe@redhat.com, vincenzo.frascino@arm.com, rafael.j.wysocki@intel.com, ndesaulniers@google.com, mingo@redhat.com, catalin.marinas@arm.com, junichi.nomura@nec.com, nathan@kernel.org, ryabinin.a.a@gmail.com, dennis@kernel.org, bp@alien8.de, kevinloughlin@google.com, morbo@google.com, dan.j.williams@intel.com, julian.stecklina@cyberus-technology.de, peterz@infradead.org, cl@linux.com, kees@kernel.org Cc: kasan-dev@googlegroups.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, llvm@lists.linux.dev, linux-doc@vger.kernel.org Subject: [PATCH 11/15] x86: LAM initialization Date: Tue, 4 Feb 2025 18:33:52 +0100 Message-ID: <01104816cdd0d430ac843847a8056d07b8770be0.1738686764.git.maciej.wieczor-retman@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: References: MIME-Version: 1.0 X-Rspamd-Queue-Id: CF4B040012 X-Stat-Signature: zp8wn961788jx8cz5h7q9gn6uamcf3nb X-Rspam-User: X-Rspamd-Server: rspam12 X-HE-Tag: 1738690612-971968 X-HE-Meta: U2FsdGVkX1/lTo6UCJP+D73rImn746X90PR/GOyuww2NONd4VovImhAg8xDtbEatiM0XyIDs8oX2RwRkcd0/F3T3F1Axku8SW/1HVyifG7wH9K8bjCN4GfH83steihMEPBASk5UBAqqvXExQQYPLqYeyC7D+p7x+64IPdixvWTceyHu+NNuP6vrMpIt7TMQFUloRdeZtu9A1hgobstT4p0+8eQ//xqKJDQkWAaZmiNnMmccgmAMq1wI23fzMoEfpf2cdvIOEOAdG3hyoBJ+vO3OSMoIiisQ3J7UERy+GHV2V5iISBLOASkOEUIMc41Vqczf4P/RxSlECzGleAbOMV/TZOaTc2MEp6PibdOaPj6itRCMgp2NQ6UbNAH6HP9s9mE++ODT1YiywaznYciYUONuqAC5tS6indCz0fZ+S9e+f/st9Ovj7StAmfbO5yry5BG62SG7+nVreQDWvSnivySELpc7lP/XHA9Ft5EsEql4/kPv5rgx+BUrZotoaQT7TWdYfdls2U5VG+UjXeheKIix5vhU1vR58oJknbSI/pU8CgISEu1iHrSYbuJqgZ4urcYMe5MywAPdF/CUWXdsBenFpaHygRcE7aOZtocN37S8RFv+DLNDOdqQE3UHaAVLwvpFBo/p5T7zGpvHq7459Njf6oHglirwF5KADUaDTsMQjWp0HKYEgM1/rY0Z5pjHeUM53Df6Awbq3bfHvbn/664wsi/zBliJ/qEF+PXzJIHB/Rky++hxfm9/uAn+W0IHnlZKo73lNI08HXrSJcn70fVRuXsmHInPUVsR4+bR2brlzMkWa+uizlS2LEAo/1sy7RWSGq4YosQWVUnmtHp7G9Qir5HfREKAH4/9QEvMKZWwqCkmmIzCAv3JJsIYIE5gqS+zQj9W1IbQLuRXvk1LQ7Fc4llBvh/J42v54sbmIiO1Yx/f02uOIUoxw4mSPJIyq9kPnDIgSeZ5GRsh2Qf3 8vPgMO16 tehymF/sxmbGHjvXVdbQmR+T7+CWuH+aTQKXdkZmr+THmPb7Z7ymE4eHEu1Y1aQEglWWw/zhYzUux/zK4nGRv2Vt5PBoDyTznV1A4fr4DTMsePQi4gcQ/Fd6p3kIn1h4e9Rvx3Rhi4+aj6C9gdA/exqVbsWCfSZMdy0RYSVl9IXWsVIpN7H3HD8lDdRClMX4iF9UCgijxo0xmgHpjvo+k+StRT6qMcLKGUo13vEpt/w2quJbKdgoyxPKxhQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: To make use of KASAN's tag based mode on x86 Linear Address Masking (LAM) needs to be enabled. To do that the 28th bit in CR4 needs to be set. Set the bit in early memory initialization. When launching secondary CPUs the LAM bit gets lost. To avoid this it needs to get added in a mask in head_64.S. The bit mask permits some bits of CR4 to pass from the primary CPU to the secondary CPUs without being cleared. Signed-off-by: Maciej Wieczor-Retman --- arch/x86/kernel/head_64.S | 3 +++ arch/x86/mm/init.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 16752b8dfa89..7cdafcedbc70 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -199,6 +199,9 @@ SYM_INNER_LABEL(common_startup_64, SYM_L_LOCAL) * there will be no global TLB entries after the execution." */ movl $(X86_CR4_PAE | X86_CR4_LA57), %edx +#ifdef CONFIG_ADDRESS_MASKING + orl $X86_CR4_LAM_SUP, %edx +#endif #ifdef CONFIG_X86_MCE /* * Preserve CR4.MCE if the kernel will enable #MC support. diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index eb503f53c319..4dc3679fedd1 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -756,6 +756,9 @@ void __init init_mem_mapping(void) probe_page_size_mask(); setup_pcid(); + if (boot_cpu_has(X86_FEATURE_LAM) && IS_ENABLED(CONFIG_KASAN_SW_TAGS)) + cr4_set_bits_and_update_boot(X86_CR4_LAM_SUP); + #ifdef CONFIG_X86_64 end = max_pfn << PAGE_SHIFT; #else