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[81.169.241.247]) by mx.google.com with ESMTPS id g2-v6si11047779edc.349.2018.07.11.04.30.11 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Jul 2018 04:30:11 -0700 (PDT) Received-SPF: pass (google.com: domain of joro@8bytes.org designates 81.169.241.247 as permitted sender) client-ip=81.169.241.247; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@8bytes.org header.s=mail-1 header.b=VjGPGLwg; spf=pass (google.com: domain of joro@8bytes.org designates 81.169.241.247 as permitted sender) smtp.mailfrom=joro@8bytes.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: by theia.8bytes.org (Postfix, from userid 1000) id 0C5688DC; Wed, 11 Jul 2018 13:30:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=8bytes.org; s=mail-1; t=1531308603; bh=XKiFWmF22ywv1jWrtPcpb3+8jP+MvcZDECdC4Z3QOuc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VjGPGLwgHMcapMwrQzU+fcFFZqG1X9R0h46qfRubxT61PSlA9eVZMgfQFouReiaqo hhNTapRqA9H/n1nFEPTJ8gPvbhmy3m286So5wHasVuHeGYl0oEmw0H0W5ojTUF0R1v iWhFywfendDuH06uZG4lU//ayTkSwdzHOdTjQN3oOf0UTeRXimRHcvdpFBG8VxSTw5 yLbWCqddZAUJcAq1nm5iq0r1gOEluVUidvciYCiW4Ntmcjjgy4KKbLGVeQiTlisXya lPUzkWoit41bq6gNEVrU41/zYFFxeW9tFqk6prsnVNxBIgXfH9Tey1HxI+91/UUZ28 o59vU0ZN3qFsA== From: Joerg Roedel To: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Linus Torvalds , Andy Lutomirski , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , aliguori@amazon.com, daniel.gruss@iaik.tugraz.at, hughd@google.com, keescook@google.com, Andrea Arcangeli , Waiman Long , Pavel Machek , "David H . Gutteridge" , jroedel@suse.de, joro@8bytes.org Subject: [PATCH 13/39] x86/entry/32: Add PTI cr3 switch to non-NMI entry/exit points Date: Wed, 11 Jul 2018 13:29:20 +0200 Message-Id: <1531308586-29340-14-git-send-email-joro@8bytes.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531308586-29340-1-git-send-email-joro@8bytes.org> References: <1531308586-29340-1-git-send-email-joro@8bytes.org> X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: X-Virus-Scanned: ClamAV using ClamSMTP From: Joerg Roedel Add unconditional cr3 switches between user and kernel cr3 to all non-NMI entry and exit points. Signed-off-by: Joerg Roedel --- arch/x86/entry/entry_32.S | 83 ++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 79 insertions(+), 4 deletions(-) diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S index 9e06431..311aefa 100644 --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -154,6 +154,33 @@ #endif /* CONFIG_X86_32_LAZY_GS */ +/* Unconditionally switch to user cr3 */ +.macro SWITCH_TO_USER_CR3 scratch_reg:req + ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI + + movl %cr3, \scratch_reg + orl $PTI_SWITCH_MASK, \scratch_reg + movl \scratch_reg, %cr3 +.Lend_\@: +.endm + +/* + * Switch to kernel cr3 if not already loaded and return current cr3 in + * \scratch_reg + */ +.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req + ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI + movl %cr3, \scratch_reg + /* Test if we are already on kernel CR3 */ + testl $PTI_SWITCH_MASK, \scratch_reg + jz .Lend_\@ + andl $(~PTI_SWITCH_MASK), \scratch_reg + movl \scratch_reg, %cr3 + /* Return original CR3 in \scratch_reg */ + orl $PTI_SWITCH_MASK, \scratch_reg +.Lend_\@: +.endm + .macro SAVE_ALL pt_regs_ax=%eax switch_stacks=0 cld /* Push segment registers and %eax */ @@ -288,7 +315,6 @@ #endif /* CONFIG_X86_ESPFIX32 */ .endm - /* * Called with pt_regs fully populated and kernel segments loaded, * so we can access PER_CPU and use the integer registers. @@ -301,11 +327,19 @@ */ #define CS_FROM_ENTRY_STACK (1 << 31) +#define CS_FROM_USER_CR3 (1 << 30) .macro SWITCH_TO_KERNEL_STACK ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV + SWITCH_TO_KERNEL_CR3 scratch_reg=%eax + + /* + * %eax now contains the entry cr3 and we carry it forward in + * that register for the time this macro runs + */ + /* Are we on the entry stack? Bail out if not! */ movl PER_CPU_VAR(cpu_entry_area), %edi addl $CPU_ENTRY_AREA_entry_stack, %edi @@ -374,7 +408,8 @@ * but switch back to the entry-stack again when we approach * iret and return to the interrupted code-path. This usually * happens when we hit an exception while restoring user-space - * segment registers on the way back to user-space. + * segment registers on the way back to user-space or when the + * sysenter handler runs with eflags.tf set. * * When we switch to the task-stack here, we can't trust the * contents of the entry-stack anymore, as the exception handler @@ -391,6 +426,7 @@ * * %esi: Entry-Stack pointer (same as %esp) * %edi: Top of the task stack + * %eax: CR3 on kernel entry */ /* Calculate number of bytes on the entry stack in %ecx */ @@ -407,6 +443,14 @@ orl $CS_FROM_ENTRY_STACK, PT_CS(%esp) /* + * Test the cr3 used to enter the kernel and add a marker + * so that we can switch back to it before iret. + */ + testl $PTI_SWITCH_MASK, %eax + jz .Lcopy_pt_regs_\@ + orl $CS_FROM_USER_CR3, PT_CS(%esp) + + /* * %esi and %edi are unchanged, %ecx contains the number of * bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate * the stack-frame on task-stack and copy everything over @@ -472,7 +516,7 @@ /* * This macro handles the case when we return to kernel-mode on the iret - * path and have to switch back to the entry stack. + * path and have to switch back to the entry stack and/or user-cr3 * * See the comments below the .Lentry_from_kernel_\@ label in the * SWITCH_TO_KERNEL_STACK macro for more details. @@ -518,6 +562,18 @@ /* Safe to switch to entry-stack now */ movl %ebx, %esp + /* + * We came from entry-stack and need to check if we also need to + * switch back to user cr3. + */ + testl $CS_FROM_USER_CR3, PT_CS(%esp) + jz .Lend_\@ + + /* Clear marker from stack-frame */ + andl $(~CS_FROM_USER_CR3), PT_CS(%esp) + + SWITCH_TO_USER_CR3 scratch_reg=%eax + .Lend_\@: .endm /* @@ -711,6 +767,18 @@ ENTRY(xen_sysenter_target) * 0(%ebp) arg6 */ ENTRY(entry_SYSENTER_32) + /* + * On entry-stack with all userspace-regs live - save and + * restore eflags and %eax to use it as scratch-reg for the cr3 + * switch. + */ + pushfl + pushl %eax + SWITCH_TO_KERNEL_CR3 scratch_reg=%eax + popl %eax + popfl + + /* Stack empty again, switch to task stack */ movl TSS_entry_stack(%esp), %esp .Lsysenter_past_esp: @@ -791,6 +859,9 @@ ENTRY(entry_SYSENTER_32) /* Switch to entry stack */ movl %eax, %esp + /* Now ready to switch the cr3 */ + SWITCH_TO_USER_CR3 scratch_reg=%eax + /* * Restore all flags except IF. (We restore IF separately because * STI gives a one-instruction window in which we won't be interrupted, @@ -871,7 +942,11 @@ restore_all: .Lrestore_all_notrace: CHECK_AND_APPLY_ESPFIX .Lrestore_nocheck: - RESTORE_REGS 4 # skip orig_eax/error_code + /* Switch back to user CR3 */ + SWITCH_TO_USER_CR3 scratch_reg=%eax + + /* Restore user state */ + RESTORE_REGS pop=4 # skip orig_eax/error_code .Lirq_return: /* * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization