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bh=tyAA/0gIK0IYL4MQ6rj9f+aiydACvqCY4T+pqHWSbEY=; b=HjqGL8Fntiusjv/cwnqTzx5oj3CTYgFEGwVUscIcJbKEPz/riqlJwBGO BV97dvJxVm0jI7h26kXQ8jp+E3Zk1Mbh6J8gJh4fekHk820hJ1lqS0+OK GS9BScKmlQ4LEyFeTAWcfcadvFBm4jFmyNdmZz7di4MsIC2ilyoqhXfGe TwdcJNlAkjCWO/Sz6VpODCoKCIG1Q9W9XGaLBcZFHT0eQBe/mXk5CCsRo 2mrQur1B6z8Y5emOZVzHMw4X/NvPmBZp8DeTCozW7QX51HZpTLnYFcLzm wxJn4cBoN2gZII9MX6DVqQdgZeJXRfLMdZzTScFmFC2uTqoJ3FCgczrSk g==; X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="329003042" X-IronPort-AV: E=Sophos;i="5.97,286,1669104000"; d="scan'208";a="329003042" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Feb 2023 01:06:16 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10616"; a="913463794" X-IronPort-AV: E=Sophos;i="5.97,286,1669104000"; d="scan'208";a="913463794" Received: from hrchavan-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.209.46.42]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Feb 2023 01:06:16 -0800 Subject: [PATCH v2 09/20] cxl/region: Move region-position validation to a helper From: Dan Williams To: linux-cxl@vger.kernel.org Cc: Vishal Verma , Fan Ni , dave.hansen@linux.intel.com, linux-mm@kvack.org, linux-acpi@vger.kernel.org Date: Fri, 10 Feb 2023 01:06:15 -0800 Message-ID: <167601997584.1924368.4615769326126138969.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167601992097.1924368.18291887895351917895.stgit@dwillia2-xfh.jf.intel.com> References: <167601992097.1924368.18291887895351917895.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 X-Rspamd-Queue-Id: 15530180002 X-Stat-Signature: 9oe4g9jpdnhmquomnrydeqzwrxesewfn X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1676019977-748429 X-HE-Meta: U2FsdGVkX1/ONRB/nlV6zvwq3ZcCRI4rwTfrhltU9xXuzaUIr5lPGcfljp6YX1yvJ8kuZ028xzh/Y76k6oWM35jQG+huymBRzo+KWD0Nxv5ekFNP2x6Es+3sIB47B2qGVnRI+vJcpX3RANl3cFBXKwoKFvQ5gYY+K8WshoVUunJYVns6v0Yyfdgx0PS24+qIm3i6IhrupzRVlF2Y8PJRaXRtdiNAwkZ9ZZp5mDI+H5nty1bfsLywsV7C7QAOOlf+lWRcOrJPa2VVpmdslU3/C3jlhlTRM1wS8fPlTokLa/Q66c6L7kgMHCjgjTXUPZYtVhTE8a0JsD4G5gkjCC1L6tE4O4IVHLXUJaA4Ek3uXYgpFeCRbKahmLWYlu7otQHT6PuWT67ShuYmlC2c+GlHGPBoAPwEHvklW/RfDqGIXhsHi7H9e7xtHd1lp0aoXGBAK2j5FhL8reROBksBvKNDZG7KMBe4+/I7Ia70yH+YtwOHG8L4rwkjeRquvRdGkBYA1g3ReDGlgqW19NhWU/JslJ1lSdjtsR5RtLoDVJBYlwXCrwksJT2/prjtEnhW9+1iUfqxaZIsdMwJUEcnDntWzsxzYNGdDrWdMfT7A8PSCRLOAFH2aeDI1TltaFw2Bw61L4rJtJ7emSI7YlWiV4Cr/Utx1dnpyoWHeFmqOvasOKNuXcvQ8nPN5KXast0ToiCzfJIdDgwOW8YLY/PBBO2qXAxSGZbxD0DOeujYRlgR/DdV06+1fCrKQQbIc7SPONCXQFdUE9/3vcmswOhmA5zs5+GS2BioKoyMNsb78XnJFBvbGh6I81nt7xV3gCZuDOoRa3PNs1LgVyTeN+tMgSsz6JCXXtr54uarrHRzBwIWeLPpLMXPd+v9OUJ6r+TaIhfIAOh7wE2TIBoLaJHmIVZlnPOv7yeGCymg0ZntXzTiqEG8i7+3/wuXi+kcA3jOPS5FWdYqptJs/IqavxICOC6 CqDQG3aQ oU259KgCisW2ShSYO9o7h10MbFHl9b8/UUYhxZJUvzIj8vZkwILkNNHyfCZnjyF78fCrxJrPVcuyJ9YsH0emmMbJK8LzTIcP8Ki8gRNn7SEpNSPX/0Iadws7nm60+bO3ARwDWWs6HBj8x2R0OFuJ3vj/eeC1MJKddZf4HHO9FmItUl2uGO0CjXj7pwTz3gWgpTDxtDIsZRWY/slc6P8vkF77yt7UC7qgDGwNXhu4AfNm8WX+oO/BXC5twqPa8EldqJVO+6RUPj8yaXyI= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: In preparation for region autodiscovery, that needs all devices discovered before their relative position in the region can be determined, consolidate all position dependent validation in a helper. Recall that in the on-demand region creation flow the end-user picks the position of a given endpoint decoder in a region. In the autodiscovery case the position of an endpoint decoder can only be determined after all other endpoint decoders that claim to decode the region's address range have been enumerated and attached. So, in the autodiscovery case endpoint decoders may be attached before their relative position is known. Once all decoders arrive, then positions can be determined and validated with cxl_region_validate_position() the same as user initiated on-demand creation. Reviewed-by: Vishal Verma Tested-by: Fan Ni Link: https://lore.kernel.org/r/167564538779.847146.8356062886811511706.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams Reviewed-by: Jonathan Cameron --- drivers/cxl/core/region.c | 119 +++++++++++++++++++++++++++++---------------- 1 file changed, 76 insertions(+), 43 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index ae7d3adcd41a..691605f1e120 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -1211,35 +1211,13 @@ static int cxl_region_setup_targets(struct cxl_region *cxlr) return 0; } -static int cxl_region_attach(struct cxl_region *cxlr, - struct cxl_endpoint_decoder *cxled, int pos) +static int cxl_region_validate_position(struct cxl_region *cxlr, + struct cxl_endpoint_decoder *cxled, + int pos) { - struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent); struct cxl_memdev *cxlmd = cxled_to_memdev(cxled); - struct cxl_port *ep_port, *root_port, *iter; struct cxl_region_params *p = &cxlr->params; - struct cxl_dport *dport; - int i, rc = -ENXIO; - - if (cxled->mode != cxlr->mode) { - dev_dbg(&cxlr->dev, "%s region mode: %d mismatch: %d\n", - dev_name(&cxled->cxld.dev), cxlr->mode, cxled->mode); - return -EINVAL; - } - - if (cxled->mode == CXL_DECODER_DEAD) { - dev_dbg(&cxlr->dev, "%s dead\n", dev_name(&cxled->cxld.dev)); - return -ENODEV; - } - - /* all full of members, or interleave config not established? */ - if (p->state > CXL_CONFIG_INTERLEAVE_ACTIVE) { - dev_dbg(&cxlr->dev, "region already active\n"); - return -EBUSY; - } else if (p->state < CXL_CONFIG_INTERLEAVE_ACTIVE) { - dev_dbg(&cxlr->dev, "interleave config missing\n"); - return -ENXIO; - } + int i; if (pos < 0 || pos >= p->interleave_ways) { dev_dbg(&cxlr->dev, "position %d out of range %d\n", pos, @@ -1278,6 +1256,71 @@ static int cxl_region_attach(struct cxl_region *cxlr, } } + return 0; +} + +static int cxl_region_attach_position(struct cxl_region *cxlr, + struct cxl_root_decoder *cxlrd, + struct cxl_endpoint_decoder *cxled, + const struct cxl_dport *dport, int pos) +{ + struct cxl_memdev *cxlmd = cxled_to_memdev(cxled); + struct cxl_port *iter; + int rc; + + if (cxlrd->calc_hb(cxlrd, pos) != dport) { + dev_dbg(&cxlr->dev, "%s:%s invalid target position for %s\n", + dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), + dev_name(&cxlrd->cxlsd.cxld.dev)); + return -ENXIO; + } + + for (iter = cxled_to_port(cxled); !is_cxl_root(iter); + iter = to_cxl_port(iter->dev.parent)) { + rc = cxl_port_attach_region(iter, cxlr, cxled, pos); + if (rc) + goto err; + } + + return 0; + +err: + for (iter = cxled_to_port(cxled); !is_cxl_root(iter); + iter = to_cxl_port(iter->dev.parent)) + cxl_port_detach_region(iter, cxlr, cxled); + return rc; +} + +static int cxl_region_attach(struct cxl_region *cxlr, + struct cxl_endpoint_decoder *cxled, int pos) +{ + struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_memdev *cxlmd = cxled_to_memdev(cxled); + struct cxl_region_params *p = &cxlr->params; + struct cxl_port *ep_port, *root_port; + struct cxl_dport *dport; + int rc = -ENXIO; + + if (cxled->mode != cxlr->mode) { + dev_dbg(&cxlr->dev, "%s region mode: %d mismatch: %d\n", + dev_name(&cxled->cxld.dev), cxlr->mode, cxled->mode); + return -EINVAL; + } + + if (cxled->mode == CXL_DECODER_DEAD) { + dev_dbg(&cxlr->dev, "%s dead\n", dev_name(&cxled->cxld.dev)); + return -ENODEV; + } + + /* all full of members, or interleave config not established? */ + if (p->state > CXL_CONFIG_INTERLEAVE_ACTIVE) { + dev_dbg(&cxlr->dev, "region already active\n"); + return -EBUSY; + } else if (p->state < CXL_CONFIG_INTERLEAVE_ACTIVE) { + dev_dbg(&cxlr->dev, "interleave config missing\n"); + return -ENXIO; + } + ep_port = cxled_to_port(cxled); root_port = cxlrd_to_port(cxlrd); dport = cxl_find_dport_by_dev(root_port, ep_port->host_bridge); @@ -1288,13 +1331,6 @@ static int cxl_region_attach(struct cxl_region *cxlr, return -ENXIO; } - if (cxlrd->calc_hb(cxlrd, pos) != dport) { - dev_dbg(&cxlr->dev, "%s:%s invalid target position for %s\n", - dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), - dev_name(&cxlrd->cxlsd.cxld.dev)); - return -ENXIO; - } - if (cxled->cxld.target_type != cxlr->type) { dev_dbg(&cxlr->dev, "%s:%s type mismatch: %d vs %d\n", dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), @@ -1318,12 +1354,13 @@ static int cxl_region_attach(struct cxl_region *cxlr, return -EINVAL; } - for (iter = ep_port; !is_cxl_root(iter); - iter = to_cxl_port(iter->dev.parent)) { - rc = cxl_port_attach_region(iter, cxlr, cxled, pos); - if (rc) - goto err; - } + rc = cxl_region_validate_position(cxlr, cxled, pos); + if (rc) + return rc; + + rc = cxl_region_attach_position(cxlr, cxlrd, cxled, dport, pos); + if (rc) + return rc; p->targets[pos] = cxled; cxled->pos = pos; @@ -1349,10 +1386,6 @@ static int cxl_region_attach(struct cxl_region *cxlr, p->nr_targets--; cxled->pos = -1; p->targets[pos] = NULL; -err: - for (iter = ep_port; !is_cxl_root(iter); - iter = to_cxl_port(iter->dev.parent)) - cxl_port_detach_region(iter, cxlr, cxled); return rc; }