From patchwork Wed Sep 26 11:36:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Zijlstra X-Patchwork-Id: 10615789 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6EAF2913 for ; Wed, 26 Sep 2018 11:54:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 606E42A987 for ; Wed, 26 Sep 2018 11:54:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 54BA22A9AE; Wed, 26 Sep 2018 11:54:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A509D2A99F for ; Wed, 26 Sep 2018 11:54:39 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 115988E0005; Wed, 26 Sep 2018 07:54:29 -0400 (EDT) Delivered-To: linux-mm-outgoing@kvack.org Received: by kanga.kvack.org (Postfix, from userid 40) id 0A10E8E0003; Wed, 26 Sep 2018 07:54:29 -0400 (EDT) X-Original-To: int-list-linux-mm@kvack.org X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id DED4E8E0009; Wed, 26 Sep 2018 07:54:28 -0400 (EDT) X-Original-To: linux-mm@kvack.org X-Delivered-To: linux-mm@kvack.org Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by kanga.kvack.org (Postfix) with ESMTP id 7345F8E0005 for ; Wed, 26 Sep 2018 07:54:28 -0400 (EDT) Received: by mail-pf1-f197.google.com with SMTP id j15-v6so14536242pff.12 for ; Wed, 26 Sep 2018 04:54:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:dkim-signature:message-id:user-agent:date:from :to:cc:subject:references:mime-version; bh=FNsWh74kzV1TOR4F01eM2Vp8b7v4O6aBxyOGm5+4Sns=; b=soSNnQOES2eXSbCX8ZlwS3KJ3sAb7kl8fhd04Xysc4C+Snl2pGl20/cE7BkrMuJM+i Ue8wZuRy8G3gqoWtH3wUPf0iNTijmBRJutAoJ7r4KbEhvA4EqM25FZjycACsy+wQhPZJ /wbsrBw0ewlG6SMiYqezj0ghCgh0Ga3IRIyaAmXZiNC7B1pZk0XpugUF3d3yBayBKuod IJ1aOO3xCxHuqzfxrjAiblTjHTCxmCmHtCuKPLdGxOCnCOySdgmwFE8JGxj6GKfKHmnd DkdYeSTkjmxsa6++uxwod6CEd5OfxArlaq/wYhe6c9p6NcZu5vJNwB/ikU0Qkn1zr5F+ JKsw== X-Gm-Message-State: ABuFfohmzkJv+SnGXXyroFe6orqGSaioLu5J0+P7AbbbQUKXVpybHaWs 3AVDWcWpYDRCQ1cPx4WPWzvnmB+OyOFNTcnnFcpLpglq+37n8uj+rxiglOQlEgkrP3GnMi+oMrc fX16hQfy4vvV1EL7dBwxC29cr0+fSLMum8WG1jpddWTiZ06AJz+fBfOjBvk1FtJtbtQ== X-Received: by 2002:a17:902:6909:: with SMTP id j9-v6mr5781634plk.196.1537962868138; Wed, 26 Sep 2018 04:54:28 -0700 (PDT) X-Google-Smtp-Source: ACcGV618H3jjC6yw8D6VKN/6diPQyoXrXNujT084AMMCKxkFvqxpNGxQZ0zE9Gbx4iv4U2npb//O X-Received: by 2002:a17:902:6909:: with SMTP id j9-v6mr5781573plk.196.1537962867344; Wed, 26 Sep 2018 04:54:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537962867; cv=none; d=google.com; s=arc-20160816; b=hjBrxMepYMWsSJtzslGserXamv63vtnqG5OM1ORqK6fRvGc4s6VKGt0VMZgCK3rjUS Q98WUdiQtcFZmcOFFiEuXtEw06A86ip56PaKqyARXqbrUgkOBGRG/i0w0yeJasmm9xjo 6Pi5ePvN30TTAa9b9oCMTEdmE+oaRlbdMKk8x4OPGNYzBb5DWiGkeZXVYV9F9NEJXMYE 4F0QzrGqhs8TGtoBreD+OGOIPM+UZJogx0f4FjZ9vrZXHyQd9w/kERsmOORn3mdTsxSO dFnpJaDxFRrW3CD+28VDEKUULymdOgnzcSf8+GkjjXPYhAmNogJcf2tWId5foYsJz/Rw tF2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:references:subject:cc:to:from:date:user-agent :message-id:dkim-signature; bh=FNsWh74kzV1TOR4F01eM2Vp8b7v4O6aBxyOGm5+4Sns=; b=DT9ZpsCSxqxofhQsr/3uYAcbfNBMRYBil9yDzuKa1pDPOP7u+AUdMp7eqIG/amxsAv yU+2KCVyS2ob9hYhxTdYnToQ9G6AGUTluiD5ITzohP2pfDok+4/DSlnKiOGkzUiVrZWN MBp3ALbvVp7PeH3QJJLj+FUqZsSgviGvZ6xeCgDHsd6KeUCOatWLCgnBmgun2sb+SRS+ MoZPDkVI2wsj+5J7NqlUSI+st6CErRLGyCcuLUJY++nDWEFdsn2z3fBTSJxXFW6XadYd keoNMoQSPW+VB/Lte53/NvLxIGe4Egy/PNF6MpjxrjN5omtNXGf349GmNNWviV7YL0kB Z6sw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20170209 header.b=djyf47LC; spf=pass (google.com: best guess record for domain of peterz@infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom=peterz@infradead.org Received: from bombadil.infradead.org (bombadil.infradead.org. [2607:7c80:54:e::133]) by mx.google.com with ESMTPS id p12-v6si4667457pfj.244.2018.09.26.04.54.27 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 26 Sep 2018 04:54:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of peterz@infradead.org designates 2607:7c80:54:e::133 as permitted sender) client-ip=2607:7c80:54:e::133; Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20170209 header.b=djyf47LC; spf=pass (google.com: best guess record for domain of peterz@infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom=peterz@infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20170209; h=Content-Type:MIME-Version:References: Subject:Cc:To:From:Date:Message-ID:Sender:Reply-To:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=FNsWh74kzV1TOR4F01eM2Vp8b7v4O6aBxyOGm5+4Sns=; b=djyf47LCZM4hS5J3X29qaMVdAj hk0IHBazK3YS6efDwUIqwhI7QnOMCPeOoSInMcVe7ccVLc6s5hEzEC8EUyFQvbHCVps5klqXwZixn RYW77AT6QLNhqPKFS/XVuw4W1uMjTPRGocYjA1/GvL16h5sORkM39WDpYLCW06Uj5zPs5gaPOLgvN JLjeu6zdWbksiSZCkpzBal7jistL8Ti8dtKTxqKL5rkzj6xgc2bIYItwvFq81lt1bJ0Z6xAA43Nqk tfNYdvzuSw1AJQFTkkPJesY7MY8gjJXSmr4pwTEcAsSbe2z/Hi2pV+X2okvvIguQlXWM+rqneBEZm 7uDcAz3Q==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by bombadil.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1g58OM-0005ve-6e; Wed, 26 Sep 2018 11:54:21 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 0) id 85984206F180A; Wed, 26 Sep 2018 13:54:04 +0200 (CEST) Message-ID: <20180926114800.718627623@infradead.org> User-Agent: quilt/0.65 Date: Wed, 26 Sep 2018 13:36:27 +0200 From: Peter Zijlstra To: will.deacon@arm.com, aneesh.kumar@linux.vnet.ibm.com, akpm@linux-foundation.org, npiggin@gmail.com Cc: linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, peterz@infradead.org, linux@armlinux.org.uk, heiko.carstens@de.ibm.com, riel@surriel.com, David Miller , Guan Xuetao Subject: [PATCH 04/18] asm-generic/tlb: Provide generic VIPT cache flush References: <20180926113623.863696043@infradead.org> MIME-Version: 1.0 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: X-Virus-Scanned: ClamAV using ClamSMTP The one obvious thing SH and ARM want is a sensible default for tlb_start_vma(). (also: https://lkml.org/lkml/2004/1/15/6 ) Avoid all VIPT architectures providing their own tlb_start_vma() implementation and rely on architectures to provide a no-op flush_cache_range() when it is not relevant. The below makes tlb_start_vma() default to flush_cache_range(), which should be right and sufficient. The only exceptions that I found where (oddly): - m68k-mmu - sparc64 - unicore Those architectures appear to have flush_cache_range(), but their current tlb_start_vma() does not call it. Cc: "Aneesh Kumar K.V" Cc: Andrew Morton Cc: Nick Piggin Cc: David Miller Cc: Guan Xuetao Acked-by: Will Deacon Signed-off-by: Peter Zijlstra (Intel) --- arch/arc/include/asm/tlb.h | 9 --------- arch/mips/include/asm/tlb.h | 9 --------- arch/nds32/include/asm/tlb.h | 6 ------ arch/nios2/include/asm/tlb.h | 10 ---------- arch/parisc/include/asm/tlb.h | 5 ----- arch/sparc/include/asm/tlb_32.h | 5 ----- arch/xtensa/include/asm/tlb.h | 9 --------- include/asm-generic/tlb.h | 19 +++++++++++-------- 8 files changed, 11 insertions(+), 61 deletions(-) --- a/arch/arc/include/asm/tlb.h +++ b/arch/arc/include/asm/tlb.h @@ -23,15 +23,6 @@ do { \ * * Note, read http://lkml.org/lkml/2004/1/15/6 */ -#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING -#define tlb_start_vma(tlb, vma) -#else -#define tlb_start_vma(tlb, vma) \ -do { \ - if (!tlb->fullmm) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ -} while(0) -#endif #define tlb_end_vma(tlb, vma) \ do { \ --- a/arch/mips/include/asm/tlb.h +++ b/arch/mips/include/asm/tlb.h @@ -5,15 +5,6 @@ #include #include -/* - * MIPS doesn't need any special per-pte or per-vma handling, except - * we need to flush cache for area to be unmapped. - */ -#define tlb_start_vma(tlb, vma) \ - do { \ - if (!tlb->fullmm) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ - } while (0) #define tlb_end_vma(tlb, vma) do { } while (0) #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) --- a/arch/nds32/include/asm/tlb.h +++ b/arch/nds32/include/asm/tlb.h @@ -4,12 +4,6 @@ #ifndef __ASMNDS32_TLB_H #define __ASMNDS32_TLB_H -#define tlb_start_vma(tlb,vma) \ - do { \ - if (!tlb->fullmm) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ - } while (0) - #define tlb_end_vma(tlb,vma) \ do { \ if(!tlb->fullmm) \ --- a/arch/nios2/include/asm/tlb.h +++ b/arch/nios2/include/asm/tlb.h @@ -15,16 +15,6 @@ extern void set_mmu_pid(unsigned long pid); -/* - * NiosII doesn't need any special per-pte or per-vma handling, except - * we need to flush cache for the area to be unmapped. - */ -#define tlb_start_vma(tlb, vma) \ - do { \ - if (!tlb->fullmm) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ - } while (0) - #define tlb_end_vma(tlb, vma) do { } while (0) #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) --- a/arch/parisc/include/asm/tlb.h +++ b/arch/parisc/include/asm/tlb.h @@ -7,11 +7,6 @@ do { if ((tlb)->fullmm) \ flush_tlb_mm((tlb)->mm);\ } while (0) -#define tlb_start_vma(tlb, vma) \ -do { if (!(tlb)->fullmm) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ -} while (0) - #define tlb_end_vma(tlb, vma) \ do { if (!(tlb)->fullmm) \ flush_tlb_range(vma, vma->vm_start, vma->vm_end); \ --- a/arch/sparc/include/asm/tlb_32.h +++ b/arch/sparc/include/asm/tlb_32.h @@ -2,11 +2,6 @@ #ifndef _SPARC_TLB_H #define _SPARC_TLB_H -#define tlb_start_vma(tlb, vma) \ -do { \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ -} while (0) - #define tlb_end_vma(tlb, vma) \ do { \ flush_tlb_range(vma, vma->vm_start, vma->vm_end); \ --- a/arch/xtensa/include/asm/tlb.h +++ b/arch/xtensa/include/asm/tlb.h @@ -16,19 +16,10 @@ #if (DCACHE_WAY_SIZE <= PAGE_SIZE) -/* Note, read http://lkml.org/lkml/2004/1/15/6 */ - -# define tlb_start_vma(tlb,vma) do { } while (0) # define tlb_end_vma(tlb,vma) do { } while (0) #else -# define tlb_start_vma(tlb, vma) \ - do { \ - if (!tlb->fullmm) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ - } while(0) - # define tlb_end_vma(tlb, vma) \ do { \ if (!tlb->fullmm) \ --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -19,6 +19,7 @@ #include #include #include +#include #ifdef CONFIG_MMU @@ -351,17 +352,19 @@ static inline unsigned long tlb_get_unma * the vmas are adjusted to only cover the region to be torn down. */ #ifndef tlb_start_vma -#define tlb_start_vma(tlb, vma) do { } while (0) +#define tlb_start_vma(tlb, vma) \ +do { \ + if (!tlb->fullmm) \ + flush_cache_range(vma, vma->vm_start, vma->vm_end); \ +} while (0) #endif -#define __tlb_end_vma(tlb, vma) \ - do { \ - if (!tlb->fullmm) \ - tlb_flush_mmu_tlbonly(tlb); \ - } while (0) - #ifndef tlb_end_vma -#define tlb_end_vma __tlb_end_vma +#define tlb_end_vma(tlb, vma) \ +do { \ + if (!tlb->fullmm) \ + tlb_flush_mmu_tlbonly(tlb); \ +} while (0) #endif #ifndef __tlb_remove_tlb_entry