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[134.134.136.20]) by mx.google.com with ESMTPS id t11si66755plr.23.2019.06.06.13.17.31 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Jun 2019 13:17:31 -0700 (PDT) Received-SPF: pass (google.com: domain of yu-cheng.yu@intel.com designates 134.134.136.20 as permitted sender) client-ip=134.134.136.20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of yu-cheng.yu@intel.com designates 134.134.136.20 as permitted sender) smtp.mailfrom=yu-cheng.yu@intel.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Jun 2019 13:17:31 -0700 X-ExtLoop1: 1 Received: from yyu32-desk1.sc.intel.com ([143.183.136.147]) by fmsmga001.fm.intel.com with ESMTP; 06 Jun 2019 13:17:30 -0700 From: Yu-cheng Yu To: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin Cc: Yu-cheng Yu Subject: [PATCH v7 03/14] x86/cet/ibt: Add IBT legacy code bitmap setup function Date: Thu, 6 Jun 2019 13:09:15 -0700 Message-Id: <20190606200926.4029-4-yu-cheng.yu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190606200926.4029-1-yu-cheng.yu@intel.com> References: <20190606200926.4029-1-yu-cheng.yu@intel.com> X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: X-Virus-Scanned: ClamAV using ClamSMTP Indirect Branch Tracking (IBT) provides an optional legacy code bitmap that allows execution of legacy, non-IBT compatible library by an IBT-enabled application. When set, each bit in the bitmap indicates one page of legacy code. The bitmap is allocated and setup from the application. Signed-off-by: Yu-cheng Yu --- arch/x86/include/asm/cet.h | 1 + arch/x86/kernel/cet.c | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/arch/x86/include/asm/cet.h b/arch/x86/include/asm/cet.h index 89330e4159a9..9e613a6598c9 100644 --- a/arch/x86/include/asm/cet.h +++ b/arch/x86/include/asm/cet.h @@ -31,6 +31,7 @@ void cet_disable_free_shstk(struct task_struct *p); int cet_restore_signal(bool ia32, struct sc_ext *sc); int cet_setup_signal(bool ia32, unsigned long rstor, struct sc_ext *sc); int cet_setup_ibt(void); +int cet_setup_ibt_bitmap(unsigned long bitmap, unsigned long size); void cet_disable_ibt(void); #else static inline int prctl_cet(int option, unsigned long arg2) { return -EINVAL; } diff --git a/arch/x86/kernel/cet.c b/arch/x86/kernel/cet.c index 14ad25b8ff21..e0ef996d3148 100644 --- a/arch/x86/kernel/cet.c +++ b/arch/x86/kernel/cet.c @@ -22,6 +22,7 @@ #include #include #include +#include #include static int set_shstk_ptr(unsigned long addr) @@ -361,3 +362,28 @@ void cet_disable_ibt(void) current->thread.cet.ibt_enabled = 0; } + +int cet_setup_ibt_bitmap(unsigned long bitmap, unsigned long size) +{ + u64 r; + + if (!current->thread.cet.ibt_enabled) + return -EINVAL; + + if (!PAGE_ALIGNED(bitmap) || (size > TASK_SIZE_MAX)) + return -EINVAL; + + current->thread.cet.ibt_bitmap_addr = bitmap; + current->thread.cet.ibt_bitmap_size = size; + + /* + * Turn on IBT legacy bitmap. + */ + modify_fpu_regs_begin(); + rdmsrl(MSR_IA32_U_CET, r); + r |= (MSR_IA32_CET_LEG_IW_EN | bitmap); + wrmsrl(MSR_IA32_U_CET, r); + modify_fpu_regs_end(); + + return 0; +}