[13/17] riscv: poison SBI calls for M-mode

Message ID	20190624054311.30256-14-hch@lst.de (mailing list archive)
State	New, archived
Headers	show Return-Path: <owner-linux-mm@kvack.org> Received-SPF: pass (google.com: best guess record for domain of batv+84882ec255bc51113d1a+5783+infradead.org+hch@bombadil.srs.infradead.org designates 2607:7c80:54:e::133 as permitted sender) client-ip=2607:7c80:54:e::133; From: Christoph Hellwig <hch@lst.de> To: Palmer Dabbelt <palmer@sifive.com>, Paul Walmsley <paul.walmsley@sifive.com> Cc: Damien Le Moal <damien.lemoal@wdc.com>, linux-riscv@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/17] riscv: poison SBI calls for M-mode Date: Mon, 24 Jun 2019 07:43:07 +0200 Message-Id: <20190624054311.30256-14-hch@lst.de> In-Reply-To: <20190624054311.30256-1-hch@lst.de> References: <20190624054311.30256-1-hch@lst.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: owner-linux-mm@kvack.org Precedence: bulk
Series	[01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU \| expand [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU [02/17] mm: stub out all of swapops.h for !CONFIG_MMU [03/17] mm/nommu: fix the MAP_UNINITIALIZED flag [04/17] irqchip/sifive-plic: set max threshold for ignored handlers [05/17] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm [06/17] riscv: refactor the IPI code [07/17] riscv: abstract out CSR names for supervisor vs machine mode [08/17] riscv: improve the default power off implementation [09/17] riscv: provide a flat entry loader [10/17] riscv: read the hart ID from mhartid on boot [11/17] riscv: provide native clint access for M-mode [12/17] riscv: implement remote sfence.i natively for M-mode [13/17] riscv: poison SBI calls for M-mode [14/17] riscv: don't allow selecting SBI-based drivers for M-mode [15/17] riscv: use the correct interrupt levels for M-mode [16/17] riscv: clear the instruction cache and all registers when booting [17/17] riscv: add nommu support

Message ID

20190624054311.30256-14-hch@lst.de (mailing list archive)

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New, archived

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Received-SPF: pass (google.com: best guess record for domain of
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From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Cc: Damien Le Moal <damien.lemoal@wdc.com>,
	linux-riscv@lists.infradead.org,
	linux-mm@kvack.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 13/17] riscv: poison SBI calls for M-mode
Date: Mon, 24 Jun 2019 07:43:07 +0200
Message-Id: <20190624054311.30256-14-hch@lst.de>
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Series

[01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU | expand

Commit Message

Christoph Hellwig June 24, 2019, 5:43 a.m. UTC

There is no SBI when we run in M-mode, so fail the compile for any code
trying to use SBI calls.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/include/asm/sbi.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 21134b3ef404..1e17f07eadaf 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -8,6 +8,7 @@ 
 
 #include <linux/types.h>
 
+#ifndef CONFIG_M_MODE
 #define SBI_SET_TIMER 0
 #define SBI_CONSOLE_PUTCHAR 1
 #define SBI_CONSOLE_GETCHAR 2
@@ -94,4 +95,5 @@  static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
 	SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
 }
 
-#endif
+#endif /* CONFIG_M_MODE */
+#endif /* _ASM_RISCV_SBI_H */

[13/17] riscv: poison SBI calls for M-mode

Commit Message

Patch