From patchwork Wed Dec 11 18:40:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 11286031 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 03CD1138D for ; Wed, 11 Dec 2019 18:49:24 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id C6F6F206A5 for ; Wed, 11 Dec 2019 18:49:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C6F6F206A5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 1920E6B3369; Wed, 11 Dec 2019 13:48:54 -0500 (EST) Delivered-To: linux-mm-outgoing@kvack.org Received: by kanga.kvack.org (Postfix, from userid 40) id DC5056B3375; Wed, 11 Dec 2019 13:48:53 -0500 (EST) X-Original-To: int-list-linux-mm@kvack.org X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 6E0C96B336A; Wed, 11 Dec 2019 13:48:53 -0500 (EST) X-Original-To: linux-mm@kvack.org X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0093.hostedemail.com [216.40.44.93]) by kanga.kvack.org (Postfix) with ESMTP id A4E396B336A for ; Wed, 11 Dec 2019 13:48:52 -0500 (EST) Received: from smtpin11.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with SMTP id 71F8082499B9 for ; Wed, 11 Dec 2019 18:48:52 +0000 (UTC) X-FDA: 76253747304.11.books58_13302ebd9bc0b X-Spam-Summary: 2,0,0,72982656636a6e5d,d41d8cd98f00b204,catalin.marinas@arm.com,:linux-arm-kernel@lists.infradead.org:will@kernel.org:maz@kernel.org:vincenzo.frascino@arm.com:szabolcs.nagy@arm.com:richard.earnshaw@arm.com:kevin.brodsky@arm.com:andreyknvl@google.com::linux-arch@vger.kernel.org,RULES_HIT:41:355:379:541:800:960:973:988:989:1260:1261:1311:1314:1345:1359:1437:1500:1515:1534:1541:1711:1730:1747:1777:1792:2393:2559:2562:2693:3138:3139:3140:3141:3142:3352:3865:3867:3870:4321:5007:6261:8634:10004:11026:11657:11658:11914:12043:12296:12297:12438:12555:12663:13069:13161:13229:13255:13311:13357:13894:14181:14384:14394:14721:21080:21230:21451:21627:30054,0,RBL:217.140.110.172:@arm.com:.lbl8.mailshell.net-62.2.0.100 64.100.201.201,CacheIP:none,Bayesian:0.5,0.5,0.5,Netcheck:none,DomainCache:0,MSF:not bulk,SPF:fp,MSBL:0,DNSBL:neutral,Custom_rules:0:0:0,LFtime:24,LUA_SUMMARY:none X-HE-Tag: books58_13302ebd9bc0b X-Filterd-Recvd-Size: 2823 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf37.hostedemail.com (Postfix) with ESMTP for ; Wed, 11 Dec 2019 18:48:51 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A5DE5106F; Wed, 11 Dec 2019 10:40:42 -0800 (PST) Received: from arrakis.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3CDB93F6CF; Wed, 11 Dec 2019 10:40:41 -0800 (PST) From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org Cc: Will Deacon , Marc Zyngier , Vincenzo Frascino , Szabolcs Nagy , Richard Earnshaw , Kevin Brodsky , Andrey Konovalov , linux-mm@kvack.org, linux-arch@vger.kernel.org Subject: [PATCH 03/22] arm64: alternative: Allow alternative_insn to always issue the first instruction Date: Wed, 11 Dec 2019 18:40:08 +0000 Message-Id: <20191211184027.20130-4-catalin.marinas@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191211184027.20130-1-catalin.marinas@arm.com> References: <20191211184027.20130-1-catalin.marinas@arm.com> MIME-Version: 1.0 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: There are situations where we do not want to disable the whole block based on a config option, only the alternative part while keeping the first instruction. Improve the alternative_insn assembler macro to take a 'first_insn' argument, default 0 to preserve the current behaviour. Signed-off-by: Catalin Marinas --- arch/arm64/include/asm/alternative.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h index b9f8d787eea9..b4d3ffe16ca6 100644 --- a/arch/arm64/include/asm/alternative.h +++ b/arch/arm64/include/asm/alternative.h @@ -101,7 +101,11 @@ static inline void apply_alternatives_module(void *start, size_t length) { } .byte \alt_len .endm -.macro alternative_insn insn1, insn2, cap, enable = 1 +/* + * Disable the whole block if enable == 0, unless first_insn == 1 in which + * case insn1 will always be issued but without an alternative insn2. + */ +.macro alternative_insn insn1, insn2, cap, enable = 1, first_insn = 0 .if \enable 661: \insn1 662: .pushsection .altinstructions, "a" @@ -112,6 +116,8 @@ static inline void apply_alternatives_module(void *start, size_t length) { } 664: .popsection .org . - (664b-663b) + (662b-661b) .org . - (662b-661b) + (664b-663b) + .elseif \first_insn + \insn1 .endif .endm