| Message ID | 20200824182758.27267-28-catalin.marinas@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: Memory Tagging Extension user-space support | expand |
Hi, On 8/24/20 11:27 AM, Catalin Marinas wrote: > From: Vincenzo Frascino <vincenzo.frascino@arm.com> > > Add Memory Tagging Extension support to the arm64 kbuild. > > Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> > Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> > --- > > Notes: > v7: > - Binutils gained initial support for MTE in 2.32.0. However, a late > architecture addition (LDGM/STGM) is only supported in the newer > 2.32.x and 2.33 versions. Change the AS_HAS_MTE option to also check > for stgm in addition to .arch armv8.5-a+memtag. > > arch/arm64/Kconfig | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 6d232837cbee..10cf81d70657 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -1664,6 +1664,37 @@ config ARCH_RANDOM > provides a high bandwidth, cryptographically secure > hardware random number generator. > > +config ARM64_AS_HAS_MTE > + # Binutils gained initial support for MTE in 2.32.0. However, a > + # late architecture addition (LDGM/STGM) is only supported in > + # the newer 2.32.x and 2.33 versions. > + def_bool $(as-instr,.arch armv8.5-a+memtag\nstgm xzr$(comma)[x0]) Would you mind translating that for me? Yes, I read the v7 Notes, but that only helped a little bit. > + > +config ARM64_MTE > + bool "Memory Tagging Extension support" > + default y > + depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI > + select ARCH_USES_HIGH_VMA_FLAGS > + help > + Memory Tagging (part of the ARMv8.5 Extensions) provides > + architectural support for run-time, always-on detection of runtime, as is used below. > + various classes of memory error to aid with software debugging > + to eliminate vulnerabilities arising from memory-unsafe > + languages. > + > + This option enables the support for the Memory Tagging > + Extension at EL0 (i.e. for userspace). > + > + Selecting this option allows the feature to be detected at > + runtime. Any secondary CPU not implementing this feature will > + not be allowed a late bring-up. > + > + Userspace binaries that want to use this feature must > + explicitly opt in. The mechanism for the userspace is > + described in: > + > + Documentation/arm64/memory-tagging-extension.rst. > + > endmenu > > config ARM64_SVE > thanks.
On Mon, Aug 24, 2020 at 11:44:50AM -0700, Randy Dunlap wrote: > On 8/24/20 11:27 AM, Catalin Marinas wrote: > > index 6d232837cbee..10cf81d70657 100644 > > --- a/arch/arm64/Kconfig > > +++ b/arch/arm64/Kconfig > > @@ -1664,6 +1664,37 @@ config ARCH_RANDOM > > provides a high bandwidth, cryptographically secure > > hardware random number generator. > > > > +config ARM64_AS_HAS_MTE > > + # Binutils gained initial support for MTE in 2.32.0. However, a > > + # late architecture addition (LDGM/STGM) is only supported in > > + # the newer 2.32.x and 2.33 versions. > > + def_bool $(as-instr,.arch armv8.5-a+memtag\nstgm xzr$(comma)[x0]) > > Would you mind translating that for me? > Yes, I read the v7 Notes, but that only helped a little bit. The initial MTE support in binutils 2.32.0, testable above with ".arch armv8.5-a+memtag", was incomplete. Historically, I think it was based on a beta version of the architecture but before the final architecture release (ARMv8.5), MTE gained a couple of new instructions: STGM/LDGM. Since there are binutils versions out there which don't understand STGM even though they claim to support .arch armv8.5-a+memtag, it's better for the above check to include the STGM instruction. I'll see if I can make the comment above clearer. > > + bool "Memory Tagging Extension support" > > + default y > > + depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI > > + select ARCH_USES_HIGH_VMA_FLAGS > > + help > > + Memory Tagging (part of the ARMv8.5 Extensions) provides > > + architectural support for run-time, always-on detection of > > runtime, > as is used below. Thanks.
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 6d232837cbee..10cf81d70657 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1664,6 +1664,37 @@ config ARCH_RANDOM provides a high bandwidth, cryptographically secure hardware random number generator. +config ARM64_AS_HAS_MTE + # Binutils gained initial support for MTE in 2.32.0. However, a + # late architecture addition (LDGM/STGM) is only supported in + # the newer 2.32.x and 2.33 versions. + def_bool $(as-instr,.arch armv8.5-a+memtag\nstgm xzr$(comma)[x0]) + +config ARM64_MTE + bool "Memory Tagging Extension support" + default y + depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI + select ARCH_USES_HIGH_VMA_FLAGS + help + Memory Tagging (part of the ARMv8.5 Extensions) provides + architectural support for run-time, always-on detection of + various classes of memory error to aid with software debugging + to eliminate vulnerabilities arising from memory-unsafe + languages. + + This option enables the support for the Memory Tagging + Extension at EL0 (i.e. for userspace). + + Selecting this option allows the feature to be detected at + runtime. Any secondary CPU not implementing this feature will + not be allowed a late bring-up. + + Userspace binaries that want to use this feature must + explicitly opt in. The mechanism for the userspace is + described in: + + Documentation/arm64/memory-tagging-extension.rst. + endmenu config ARM64_SVE