From patchwork Tue Jun 22 22:25:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Hansen X-Patchwork-Id: 12338681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5CEBC49EA6 for ; Tue, 22 Jun 2021 22:25:52 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 8673861003 for ; Tue, 22 Jun 2021 22:25:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8673861003 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id AF57C6B0071; Tue, 22 Jun 2021 18:25:48 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id AA5946B0072; Tue, 22 Jun 2021 18:25:48 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 96DE16B0073; Tue, 22 Jun 2021 18:25:48 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 519B56B0071 for ; Tue, 22 Jun 2021 18:25:48 -0400 (EDT) Received: from smtpin40.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id 816F5181AC537 for ; Tue, 22 Jun 2021 22:25:48 +0000 (UTC) X-FDA: 78282793176.40.2F484ED Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by imf19.hostedemail.com (Postfix) with ESMTP id EDF0C9001E53 for ; Tue, 22 Jun 2021 22:25:47 +0000 (UTC) IronPort-SDR: G+AraVoIB7FmbaJzQU32QJKXLxBBBtlSQMkrjVQZXR1oAqfytPPF1XakG9DtGRLPNZecwEpLrW p59xMO9gnlGw== X-IronPort-AV: E=McAfee;i="6200,9189,10023"; a="292779522" X-IronPort-AV: E=Sophos;i="5.83,292,1616482800"; d="scan'208";a="292779522" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2021 15:25:46 -0700 IronPort-SDR: VWFfuWB7fCT2KYI9MuTVuNJvq9iDi7YLvnztjh0qOiCIIi99195CMHpot2knP1mUi7q96By/zK JJDrPs17HFfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,292,1616482800"; d="scan'208";a="641791400" Received: from viggo.jf.intel.com (HELO localhost.localdomain) ([10.54.77.144]) by fmsmga005.fm.intel.com with ESMTP; 22 Jun 2021 15:25:45 -0700 Subject: [RFC][PATCH 3/8] x86/fpu: separate the setup of xfeatures not in fpstate To: linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org,Dave Hansen ,tglx@linutronix.de,mingo@redhat.com,bp@alien8.de,x86@kernel.org,luto@kernel.org From: Dave Hansen Date: Tue, 22 Jun 2021 15:25:00 -0700 References: <20210622222455.E901B5AC@viggo.jf.intel.com> In-Reply-To: <20210622222455.E901B5AC@viggo.jf.intel.com> Message-Id: <20210622222500.2A850129@viggo.jf.intel.com> Authentication-Results: imf19.hostedemail.com; dkim=none; spf=none (imf19.hostedemail.com: domain of dave.hansen@linux.intel.com has no SPF policy when checking 192.55.52.43) smtp.mailfrom=dave.hansen@linux.intel.com; dmarc=fail reason="No valid SPF, No valid DKIM" header.from=intel.com (policy=none) X-Stat-Signature: 5mjyi3fhsgima4ow81dopugj8branz1y X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: EDF0C9001E53 X-HE-Tag: 1624400747-422761 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Dave Hansen The goal of this series is to create a new class of xfeature: one which is enabled in XCR0 so that XSAVE/XRSTOR continue to work on it, but where the kernel does not use XSAVE*/XRSTOR* to manage the state or to maintain it in the thread FPU buffer (fpstate). Create a new helper in the XSAVE setup code: xstate_fpstate_enabled(). This helper returns whether or not an xfeature is being maintained inside of the thread's fpstate. For now, make xstate_fpstate_enabled() function identically to xfeature_enabled(). This ensures that this series is bisectable between this point and where PKRU is actually removed from xfeature_fpstate_enabled(). This series originally introduced xfeatures_mask_fpstate() to mean: "the set of features found in the kernel fpstate and managed by XSAVE". However, upstream ripped me off and made an identically- named function which refers to the features managed by XSAVE, which *excludes* PKRU at this juncture. That means that xfeature_fpstate_enabled() and xfeatures_mask_fpstate() will diverge until the end of the series. Signed-off-by: Dave Hansen Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: x86@kernel.org Cc: Andy Lutomirski --- b/arch/x86/kernel/fpu/xstate.c | 40 ++++++++++++++++++++++++++++++---------- 1 file changed, 30 insertions(+), 10 deletions(-) diff -puN arch/x86/kernel/fpu/xstate.c~xfeature-setup-fpstate arch/x86/kernel/fpu/xstate.c --- a/arch/x86/kernel/fpu/xstate.c~xfeature-setup-fpstate 2021-06-22 14:49:08.956051757 -0700 +++ b/arch/x86/kernel/fpu/xstate.c 2021-06-22 14:49:08.965051757 -0700 @@ -156,16 +156,32 @@ void fpu__init_cpu_xstate(void) } } +/* Can the XSAVE architecture be used to manage this feature? */ static bool xfeature_enabled(enum xfeature xfeature) { return xfeatures_mask_all & BIT_ULL(xfeature); } /* + * Is space for the feature present in the task->thread.fpu + * fpstate buffer and is the using XSAVE to context-switch it? + */ +static bool xfeature_fpstate_enabled(enum xfeature xfeature) +{ + // For bisectability, mirror xfeature_enabled() for now. + //return xfeatures_mask_fpstate() & BIT_ULL(xfeature); + return xfeature_enabled(xfeature); +} + +/* * Record the offsets and sizes of various xstates contained - * in the XSAVE state memory layout. + * in the non-compacted XSAVE state memory layout. + * + * These are always used in the XSAVE ABIs and are used for + * the kernel xstate buffer in cases where XSAVES (and thus + * the compacted format) is not supported. */ -static void __init setup_xstate_features(void) +static void __init setup_xfeature_offsets(void) { u32 eax, ebx, ecx, edx, i; /* start at the beginning of the "extended state" */ @@ -185,6 +201,10 @@ static void __init setup_xstate_features xmm_space); for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { + /* + * Set up any features enabled that are in the kernel + * xstate buffer *or* the user XSAVE ABIs. + */ if (!xfeature_enabled(i)) continue; @@ -257,7 +277,7 @@ static int xfeature_is_aligned(int xfeat CHECK_XFEATURE(xfeature_nr); - if (!xfeature_enabled(xfeature_nr)) { + if (!xfeature_fpstate_enabled(xfeature_nr)) { WARN_ONCE(1, "Checking alignment of disabled xfeature %d\n", xfeature_nr); return 0; @@ -293,7 +313,7 @@ static void __init setup_xstate_comp_off if (!boot_cpu_has(X86_FEATURE_XSAVES)) { for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { - if (xfeature_enabled(i)) + if (xfeature_fpstate_enabled(i)) xstate_comp_offsets[i] = xstate_offsets[i]; } return; @@ -302,7 +322,7 @@ static void __init setup_xstate_comp_off next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE; for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { - if (!xfeature_enabled(i)) + if (!xfeature_fpstate_enabled(i)) continue; if (xfeature_is_aligned(i)) @@ -329,7 +349,7 @@ static void __init setup_supervisor_only next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE; for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { - if (!xfeature_enabled(i) || !xfeature_is_supervisor(i)) + if (!xfeature_fpstate_enabled(i) || !xfeature_is_supervisor(i)) continue; if (xfeature_is_aligned(i)) @@ -348,7 +368,7 @@ static void __init print_xstate_offset_s int i; for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { - if (!xfeature_enabled(i)) + if (!xfeature_fpstate_enabled(i)) continue; pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", i, xstate_comp_offsets[i], i, xstate_sizes[i]); @@ -391,7 +411,7 @@ static void __init setup_init_fpu_buf(vo if (!boot_cpu_has(X86_FEATURE_XSAVE)) return; - setup_xstate_features(); + setup_xfeature_offsets(); print_xstate_features(); if (boot_cpu_has(X86_FEATURE_XSAVES)) @@ -562,7 +582,7 @@ static void do_extra_xstate_size_checks( int i; for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { - if (!xfeature_enabled(i)) + if (!xfeature_fpstate_enabled(i)) continue; check_xstate_against_struct(i); @@ -849,7 +869,7 @@ void fpu__resume_cpu(void) */ static void *__raw_xsave_addr(struct xregs_state *xsave, int xfeature_nr) { - if (!xfeature_enabled(xfeature_nr)) { + if (!xfeature_fpstate_enabled(xfeature_nr)) { WARN_ON_FPU(1); return NULL; }