| Message ID | 20211210154332.11526-24-brijesh.singh@amd.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add AMD Secure Nested Paging (SEV-SNP) Guest Support | expand |
On 2021-12-10 09:43:15 -0600, Brijesh Singh wrote: > From: Michael Roth <michael.roth@amd.com> > > Determining which CPUID leafs have significant ECX/index values is > also needed by guest kernel code when doing SEV-SNP-validated CPUID > lookups. Move this to common code to keep future updates in sync. > > Signed-off-by: Michael Roth <michael.roth@amd.com> > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Venu Busireddy <venu.busireddy@oracle.com> > --- > arch/x86/include/asm/cpuid.h | 26 ++++++++++++++++++++++++++ > arch/x86/kvm/cpuid.c | 17 ++--------------- > 2 files changed, 28 insertions(+), 15 deletions(-) > create mode 100644 arch/x86/include/asm/cpuid.h > > diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h > new file mode 100644 > index 000000000000..61426eb1f665 > --- /dev/null > +++ b/arch/x86/include/asm/cpuid.h > @@ -0,0 +1,26 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_X86_CPUID_H > +#define _ASM_X86_CPUID_H > + > +static __always_inline bool cpuid_function_is_indexed(u32 function) > +{ > + switch (function) { > + case 4: > + case 7: > + case 0xb: > + case 0xd: > + case 0xf: > + case 0x10: > + case 0x12: > + case 0x14: > + case 0x17: > + case 0x18: > + case 0x1f: > + case 0x8000001d: > + return true; > + } > + > + return false; > +} > + > +#endif /* _ASM_X86_CPUID_H */ > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 07e9215e911d..6b99e8e87480 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -19,6 +19,7 @@ > #include <asm/user.h> > #include <asm/fpu/xstate.h> > #include <asm/sgx.h> > +#include <asm/cpuid.h> > #include "cpuid.h" > #include "lapic.h" > #include "mmu.h" > @@ -626,22 +627,8 @@ static struct kvm_cpuid_entry2 *do_host_cpuid(struct kvm_cpuid_array *array, > cpuid_count(entry->function, entry->index, > &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); > > - switch (function) { > - case 4: > - case 7: > - case 0xb: > - case 0xd: > - case 0xf: > - case 0x10: > - case 0x12: > - case 0x14: > - case 0x17: > - case 0x18: > - case 0x1f: > - case 0x8000001d: > + if (cpuid_function_is_indexed(function)) > entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; > - break; > - } > > return entry; > } > -- > 2.25.1 >
diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h new file mode 100644 index 000000000000..61426eb1f665 --- /dev/null +++ b/arch/x86/include/asm/cpuid.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_X86_CPUID_H +#define _ASM_X86_CPUID_H + +static __always_inline bool cpuid_function_is_indexed(u32 function) +{ + switch (function) { + case 4: + case 7: + case 0xb: + case 0xd: + case 0xf: + case 0x10: + case 0x12: + case 0x14: + case 0x17: + case 0x18: + case 0x1f: + case 0x8000001d: + return true; + } + + return false; +} + +#endif /* _ASM_X86_CPUID_H */ diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 07e9215e911d..6b99e8e87480 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -19,6 +19,7 @@ #include <asm/user.h> #include <asm/fpu/xstate.h> #include <asm/sgx.h> +#include <asm/cpuid.h> #include "cpuid.h" #include "lapic.h" #include "mmu.h" @@ -626,22 +627,8 @@ static struct kvm_cpuid_entry2 *do_host_cpuid(struct kvm_cpuid_array *array, cpuid_count(entry->function, entry->index, &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); - switch (function) { - case 4: - case 7: - case 0xb: - case 0xd: - case 0xf: - case 0x10: - case 0x12: - case 0x14: - case 0x17: - case 0x18: - case 0x1f: - case 0x8000001d: + if (cpuid_function_is_indexed(function)) entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - break; - } return entry; }