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David Alan Gilbert" , , , , Brijesh Singh Subject: [PATCH v8 34/40] x86/sev: add SEV-SNP feature detection/setup Date: Fri, 10 Dec 2021 09:43:26 -0600 Message-ID: <20211210154332.11526-35-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211210154332.11526-1-brijesh.singh@amd.com> References: <20211210154332.11526-1-brijesh.singh@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB03.amd.com (10.181.40.144) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 132c4e97-9653-4dd5-b8ce-08d9bbf3fd54 X-MS-TrafficTypeDiagnostic: BY5PR12MB5557:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +ywT2Tnd4ivzxNvrV4hTX7WsVtYA3KEijPgTYZAZ1C8K+fOJ+mRvwdj2PpEt2unIS2LYRwYaIVx56zBFt6CYuBHGdb8HdIl/+No40sx+mFlAYjqHFjMVVyVj7hLdUsk2DoUAJveSAA4GF6y+GPrVUNMnvMB1QDpcXjyZ4nyDrBoJ6sZTsooW9B7f8LNgR0TmrRLUk4v2F6U9WzTL9vYuLbHI36FXLjzdlBx2MH0vKA6lCk2teS5aQNqOG/DLACta7PvWvtt+5R9uYP1W3VRdUKYK5xi5Z9rcSa6FzsAq4ZJvzGnxHK5Ksk8pexJTyLOqK9z3pan8j+c7XPbiF3e4ZeABt++Qzq5BQ3XQnSID0SLhXLgixOCmpMJhMrYr0CPq28bPQsoJTCL91bOZqavDVHnw9Ak/0aU+HGj1rHBttZ7c0ZcGQbRuqAH4As7O4ID/QO9patzWmO9zc9z07jBDGArCQh+bfNIke51l7UIgv1VEmm2On5iY7d0QCYJJapS4B3FXRjUwVpW3pLME972lkSoBUnVQmDs6wnQPn+c/XlpcM8DI0Yjh8qMh/81Ngy918jFIWx2czE6VOIAp2G9zS8gew1U1MWKNrDVKDncJeh7lbvpGy2qdY6iDWCRNv2QKXwPlVKdnXUUCMnv29sg9Rrwdm/IigrXe8Gsi7iNoFbquMn7axnkpC/VZNrt+FXf+v/gq9+bIzcsqp0Vz04fLfhdjE0gCwkoTCdDz5IVqytg8RIx1sRS4ldKOLe9G1P7TVgLUwH/ALsAFpD5nM8FQPQQX0AqpqQsPOvxDWXWIN/Z7ooL9dilJqRB6EVCLOmN0 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(40470700001)(186003)(82310400004)(6666004)(2616005)(1076003)(83380400001)(508600001)(26005)(16526019)(86362001)(44832011)(4326008)(36860700001)(5660300002)(36756003)(7406005)(7416002)(47076005)(336012)(7696005)(316002)(8936002)(54906003)(110136005)(426003)(70586007)(70206006)(40460700001)(356005)(81166007)(8676002)(2906002)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Dec 2021 15:44:44.7353 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 132c4e97-9653-4dd5-b8ce-08d9bbf3fd54 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB5557 X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 6B4B040010 X-Stat-Signature: haksg8we1exmyyiax9r3paphkyqkkwmg Authentication-Results: imf27.hostedemail.com; dkim=pass header.d=amd.com header.s=selector1 header.b=lAGZcPcW; spf=pass (imf27.hostedemail.com: domain of brijesh.singh@amd.com designates 40.107.94.84 as permitted sender) smtp.mailfrom=brijesh.singh@amd.com; dmarc=pass (policy=quarantine) header.from=amd.com X-HE-Tag: 1639151088-955522 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Michael Roth Initial/preliminary detection of SEV-SNP is done via the Confidential Computing blob. Check for it prior to the normal SEV/SME feature initialization, and add some sanity checks to confirm it agrees with SEV-SNP CPUID/MSR bits. Signed-off-by: Michael Roth Signed-off-by: Brijesh Singh --- arch/x86/include/asm/sev.h | 3 +- arch/x86/kernel/sev-shared.c | 2 +- arch/x86/kernel/sev.c | 65 ++++++++++++++++++++++++++++++ arch/x86/mm/mem_encrypt_identity.c | 8 ++++ 4 files changed, 76 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index 4fa7ca20d7c9..4d32af1348ed 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -147,6 +147,7 @@ void snp_set_memory_shared(unsigned long vaddr, unsigned int npages); void snp_set_memory_private(unsigned long vaddr, unsigned int npages); void snp_set_wakeup_secondary_cpu(void); bool snp_init(struct boot_params *bp); +void snp_abort(void); /* * TODO: These are exported only temporarily while boot/compressed/sev.c is * the only user. This is to avoid unused function warnings for kernel/sev.c @@ -156,7 +157,6 @@ bool snp_init(struct boot_params *bp); * can be moved back to being statically-scoped to units that pull in * sev-shared.c via #include and these declarations can be dropped. */ -struct cc_blob_sev_info *snp_find_cc_blob_setup_data(struct boot_params *bp); void snp_cpuid_info_create(const struct cc_blob_sev_info *cc_info); #else static inline void sev_es_ist_enter(struct pt_regs *regs) { } @@ -176,6 +176,7 @@ static inline void snp_set_memory_shared(unsigned long vaddr, unsigned int npage static inline void snp_set_memory_private(unsigned long vaddr, unsigned int npages) { } static inline void snp_set_wakeup_secondary_cpu(void) { } static inline bool snp_init(struct boot_params *bp) { return false; } +static inline void snp_abort(void) { } #endif #endif diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c index 5cb8f87df4b3..72836abcdbe2 100644 --- a/arch/x86/kernel/sev-shared.c +++ b/arch/x86/kernel/sev-shared.c @@ -974,7 +974,7 @@ static struct cc_setup_data *get_cc_setup_data(struct boot_params *bp) * Search for a Confidential Computing blob passed in as a setup_data entry * via the Linux Boot Protocol. */ -struct cc_blob_sev_info * +static struct cc_blob_sev_info * snp_find_cc_blob_setup_data(struct boot_params *bp) { struct cc_setup_data *sd; diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index 32f60602ec29..0e5c45eacc77 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -1949,3 +1949,68 @@ bool __init handle_vc_boot_ghcb(struct pt_regs *regs) while (true) halt(); } + +/* + * Initial set up of SEV-SNP relies on information provided by the + * Confidential Computing blob, which can be passed to the kernel + * in the following ways, depending on how it is booted: + * + * - when booted via the boot/decompress kernel: + * - via boot_params + * + * - when booted directly by firmware/bootloader (e.g. CONFIG_PVH): + * - via a setup_data entry, as defined by the Linux Boot Protocol + * + * Scan for the blob in that order. + */ +static struct cc_blob_sev_info *snp_find_cc_blob(struct boot_params *bp) +{ + struct cc_blob_sev_info *cc_info; + + /* Boot kernel would have passed the CC blob via boot_params. */ + if (bp->cc_blob_address) { + cc_info = (struct cc_blob_sev_info *) + (unsigned long)bp->cc_blob_address; + goto found_cc_info; + } + + /* + * If kernel was booted directly, without the use of the + * boot/decompression kernel, the CC blob may have been passed via + * setup_data instead. + */ + cc_info = snp_find_cc_blob_setup_data(bp); + if (!cc_info) + return NULL; + +found_cc_info: + if (cc_info->magic != CC_BLOB_SEV_HDR_MAGIC) + sev_es_terminate(1, GHCB_SNP_UNSUPPORTED); + + return cc_info; +} + +bool __init snp_init(struct boot_params *bp) +{ + struct cc_blob_sev_info *cc_info; + + if (!bp) + return false; + + cc_info = snp_find_cc_blob(bp); + if (!cc_info) + return false; + + /* + * The CC blob will be used later to access the secrets page. Cache + * it here like the boot kernel does. + */ + bp->cc_blob_address = (u32)(unsigned long)cc_info; + + return true; +} + +void __init snp_abort(void) +{ + sev_es_terminate(1, GHCB_SNP_UNSUPPORTED); +} diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c index 3f0abb403340..2f723e106ed3 100644 --- a/arch/x86/mm/mem_encrypt_identity.c +++ b/arch/x86/mm/mem_encrypt_identity.c @@ -44,6 +44,7 @@ #include #include #include +#include #include "mm_internal.h" @@ -508,8 +509,11 @@ void __init sme_enable(struct boot_params *bp) bool active_by_default; unsigned long me_mask; char buffer[16]; + bool snp; u64 msr; + snp = snp_init(bp); + /* Check for the SME/SEV support leaf */ eax = 0x80000000; ecx = 0; @@ -541,6 +545,10 @@ void __init sme_enable(struct boot_params *bp) sev_status = __rdmsr(MSR_AMD64_SEV); feature_mask = (sev_status & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT; + /* The SEV-SNP CC blob should never be present unless SEV-SNP is enabled. */ + if (snp && !(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) + snp_abort(); + /* Check if memory encryption is enabled */ if (feature_mask == AMD_SME_BIT) { /*