From patchwork Sun Jan 30 21:18:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgecombe, Rick P" X-Patchwork-Id: 12730155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0052C433EF for ; Sun, 30 Jan 2022 21:22:33 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 8D1C66B00B1; Sun, 30 Jan 2022 16:22:08 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 8A9786B00B3; Sun, 30 Jan 2022 16:22:08 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 7222B6B00B4; Sun, 30 Jan 2022 16:22:08 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0053.hostedemail.com [216.40.44.53]) by kanga.kvack.org (Postfix) with ESMTP id 5E2446B00B1 for ; Sun, 30 Jan 2022 16:22:08 -0500 (EST) Received: from smtpin09.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay02.hostedemail.com (Postfix) with ESMTP id 2B39696765 for ; Sun, 30 Jan 2022 21:22:08 +0000 (UTC) X-FDA: 79088226336.09.4941C6C Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by imf16.hostedemail.com (Postfix) with ESMTP id 3246D180004 for ; Sun, 30 Jan 2022 21:22:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643577727; x=1675113727; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=nKIQtVTcJcJc4kRj9os/sAR9Nug8XbfOG4wi9emXZyE=; b=JJwhC8mmGVBB8WP6EbhCBbm2hpGUna8V3gwIdSQGWwee8xJQjxRfw29T t5Lj1ZZ+/nZ22WZ9lpUoRrbaYwJDau8z6o6dME5BIQ4VpOL2PXmQuLEog ihGgd2TO1u5vegBkqrP0C4k1fOnOfFwlUK5EimF9+EcS+dZvy3WOE3Ccv V5WwKSXBCtTD5WVpMl48XuFOhvwyVvHrqp3AZOm0eCqWGQWOThuydfZ/O zOgrmnT8YSfX6WhpSonSGfayzRF5cs3tVYlXm75zO28ytZhwHL3xFXJYb ToFZoXDmkW3fLJ5Ra8MjojBJuELmNmEdkw8uyo0R5VLp9GR9ZAmDNFo1L w==; X-IronPort-AV: E=McAfee;i="6200,9189,10243"; a="244970224" X-IronPort-AV: E=Sophos;i="5.88,329,1635231600"; d="scan'208";a="244970224" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2022 13:22:06 -0800 X-IronPort-AV: E=Sophos;i="5.88,329,1635231600"; d="scan'208";a="536856894" Received: from avmallar-mobl1.amr.corp.intel.com (HELO rpedgeco-desk.amr.corp.intel.com) ([10.209.123.171]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2022 13:22:05 -0800 From: Rick Edgecombe To: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V . Shankar" , Dave Martin , Weijiang Yang , "Kirill A . Shutemov" , joao.moreira@intel.com, John Allen , kcc@google.com, eranian@google.com Cc: rick.p.edgecombe@intel.com, Yu-cheng Yu Subject: [PATCH 25/35] x86/cet/shstk: Add user-mode shadow stack support Date: Sun, 30 Jan 2022 13:18:28 -0800 Message-Id: <20220130211838.8382-26-rick.p.edgecombe@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220130211838.8382-1-rick.p.edgecombe@intel.com> References: <20220130211838.8382-1-rick.p.edgecombe@intel.com> Authentication-Results: imf16.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=JJwhC8mm; spf=none (imf16.hostedemail.com: domain of rick.p.edgecombe@intel.com has no SPF policy when checking 192.55.52.93) smtp.mailfrom=rick.p.edgecombe@intel.com; dmarc=pass (policy=none) header.from=intel.com X-Rspam-User: nil X-Rspamd-Queue-Id: 3246D180004 X-Stat-Signature: 3r6rjg76ub3p3a6tcxcnkzfcfn451j1f X-Rspamd-Server: rspam12 X-HE-Tag: 1643577727-280484 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Yu-cheng Yu Introduce basic shadow stack enabling/disabling/allocation routines. A task's shadow stack is allocated from memory with VM_SHADOW_STACK flag and has a fixed size of min(RLIMIT_STACK, 4GB). Add the user shadow stack MSRs to the xsave helpers, so they can be used to implement the functionality. Keep the task's shadow stack address and size in thread_struct. This will be copied when cloning new threads, but needs to be cleared during exec, so add a function to do this. Signed-off-by: Yu-cheng Yu Signed-off-by: Rick Edgecombe Cc: Kees Cook --- v1: - Switch to xsave helpers. - Expand commit log. Yu-cheng v30: - Remove superfluous comments for struct thread_shstk. - Replace 'populate' with 'unused'. Yu-cheng v28: - Update shstk_setup() with wrmsrl_safe(), returns success when shadow stack feature is not present (since this is a setup function). Yu-cheng v27: - Change 'struct cet_status' to 'struct thread_shstk', and change member types from unsigned long to u64. - Re-order local variables in reverse order of length. - WARN_ON_ONCE() when vm_munmap() fails. arch/x86/include/asm/cet.h | 29 ++++++ arch/x86/include/asm/processor.h | 5 ++ arch/x86/kernel/Makefile | 1 + arch/x86/kernel/fpu/xstate.c | 5 +- arch/x86/kernel/process_64.c | 2 + arch/x86/kernel/shstk.c | 149 +++++++++++++++++++++++++++++++ 6 files changed, 190 insertions(+), 1 deletion(-) create mode 100644 arch/x86/include/asm/cet.h create mode 100644 arch/x86/kernel/shstk.c diff --git a/arch/x86/include/asm/cet.h b/arch/x86/include/asm/cet.h new file mode 100644 index 000000000000..de90e4ae083a --- /dev/null +++ b/arch/x86/include/asm/cet.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_X86_CET_H +#define _ASM_X86_CET_H + +#ifndef __ASSEMBLY__ +#include + +struct task_struct; + +struct thread_shstk { + u64 base; + u64 size; +}; + +#ifdef CONFIG_X86_SHADOW_STACK +int shstk_setup(void); +void shstk_free(struct task_struct *p); +int shstk_disable(void); +void reset_thread_shstk(void); +#else +static inline void shstk_setup(void) {} +static inline void shstk_free(struct task_struct *p) {} +static inline void shstk_disable(void) {} +static inline void reset_thread_shstk(void) {} +#endif /* CONFIG_X86_SHADOW_STACK */ + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_X86_CET_H */ diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 2c5f12ae7d04..a9f4e9c4ca81 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -27,6 +27,7 @@ struct vm86; #include #include #include +#include #include #include @@ -528,6 +529,10 @@ struct thread_struct { */ u32 pkru; +#ifdef CONFIG_X86_SHADOW_STACK + struct thread_shstk shstk; +#endif + /* Floating point and extended processor state */ struct fpu fpu; /* diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 6aef9ee28a39..d60ae6c365c7 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -153,6 +153,7 @@ obj-$(CONFIG_AMD_MEM_ENCRYPT) += sev.o obj-$(CONFIG_ARCH_HAS_CC_PLATFORM) += cc_platform.o +obj-$(CONFIG_X86_SHADOW_STACK) += shstk.o ### # 64 bit specific files ifeq ($(CONFIG_X86_64),y) diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index c5e20e0d0725..25b1b0c417fd 100644 --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -1871,7 +1871,10 @@ int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns, static u64 *__get_xsave_member(void *xstate, u32 msr) { switch (msr) { - /* Currently there are no MSR's supported */ + case MSR_IA32_PL3_SSP: + return &((struct cet_user_state *)xstate)->user_ssp; + case MSR_IA32_U_CET: + return &((struct cet_user_state *)xstate)->user_cet; default: WARN_ONCE(1, "x86/fpu: unsupported xstate msr (%u)\n", msr); return NULL; diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 3402edec236c..f05fe27d4967 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -514,6 +514,8 @@ start_thread_common(struct pt_regs *regs, unsigned long new_ip, load_gs_index(__USER_DS); } + reset_thread_shstk(); + loadsegment(fs, 0); loadsegment(es, _ds); loadsegment(ds, _ds); diff --git a/arch/x86/kernel/shstk.c b/arch/x86/kernel/shstk.c new file mode 100644 index 000000000000..4e8686ed885f --- /dev/null +++ b/arch/x86/kernel/shstk.c @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * shstk.c - Intel shadow stack support + * + * Copyright (c) 2021, Intel Corporation. + * Yu-cheng Yu + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static unsigned long alloc_shstk(unsigned long size) +{ + int flags = MAP_ANONYMOUS | MAP_PRIVATE; + struct mm_struct *mm = current->mm; + unsigned long addr, unused; + + mmap_write_lock(mm); + addr = do_mmap(NULL, 0, size, PROT_READ, flags, VM_SHADOW_STACK, 0, + &unused, NULL); + mmap_write_unlock(mm); + + return addr; +} + +static void unmap_shadow_stack(u64 base, u64 size) +{ + while (1) { + int r; + + r = vm_munmap(base, size); + + /* + * vm_munmap() returns -EINTR when mmap_lock is held by + * something else, and that lock should not be held for a + * long time. Retry it for the case. + */ + if (r == -EINTR) { + cond_resched(); + continue; + } + + /* + * For all other types of vm_munmap() failure, either the + * system is out of memory or there is bug. + */ + WARN_ON_ONCE(r); + break; + } +} + +int shstk_setup(void) +{ + struct thread_shstk *shstk = ¤t->thread.shstk; + unsigned long addr, size; + void *xstate; + int err; + + if (!cpu_feature_enabled(X86_FEATURE_SHSTK) || + shstk->size || + shstk->base) + return 1; + + size = PAGE_ALIGN(min_t(unsigned long long, rlimit(RLIMIT_STACK), SZ_4G)); + addr = alloc_shstk(size); + if (IS_ERR_VALUE(addr)) + return 1; + + xstate = start_update_xsave_msrs(XFEATURE_CET_USER); + err = xsave_wrmsrl(xstate, MSR_IA32_PL3_SSP, addr + size); + if (!err) + err = xsave_wrmsrl(xstate, MSR_IA32_U_CET, CET_SHSTK_EN); + end_update_xsave_msrs(); + + if (err) { + /* + * Don't leak shadow stack if something went wrong with writing the + * msrs. Warn about it because things may be in a weird state. + */ + WARN_ON_ONCE(1); + unmap_shadow_stack(addr, size); + return 1; + } + + shstk->base = addr; + shstk->size = size; + return 0; +} + +void reset_thread_shstk(void) +{ + memset(¤t->thread.shstk, 0, sizeof(struct thread_shstk)); +} + +void shstk_free(struct task_struct *tsk) +{ + struct thread_shstk *shstk = &tsk->thread.shstk; + + if (!cpu_feature_enabled(X86_FEATURE_SHSTK) || + !shstk->size || + !shstk->base) + return; + + if (!tsk->mm) + return; + + unmap_shadow_stack(shstk->base, shstk->size); + + shstk->base = 0; + shstk->size = 0; +} + +int shstk_disable(void) +{ + struct thread_shstk *shstk = ¤t->thread.shstk; + void *xstate; + int err; + + if (!cpu_feature_enabled(X86_FEATURE_SHSTK) || + !shstk->size || + !shstk->base) + return 1; + + xstate = start_update_xsave_msrs(XFEATURE_CET_USER); + err = xsave_set_clear_bits_msrl(xstate, MSR_IA32_U_CET, 0, CET_SHSTK_EN); + if (!err) + err = xsave_wrmsrl(xstate, MSR_IA32_PL3_SSP, 0); + end_update_xsave_msrs(); + + if (err) + return 1; + + shstk_free(current); + return 0; +}