From patchwork Mon Feb 13 04:53:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13137859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD644C64ED6 for ; Mon, 13 Feb 2023 04:54:18 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 120DF6B0074; Sun, 12 Feb 2023 23:54:18 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id F27966B0075; Sun, 12 Feb 2023 23:54:17 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id DC7896B007B; Sun, 12 Feb 2023 23:54:17 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id C74146B0074 for ; Sun, 12 Feb 2023 23:54:17 -0500 (EST) Received: from smtpin10.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id DA87E1A149B for ; Mon, 13 Feb 2023 04:54:16 +0000 (UTC) X-FDA: 80461052112.10.28A6C5A Received: from mail-pj1-f47.google.com (mail-pj1-f47.google.com [209.85.216.47]) by imf04.hostedemail.com (Postfix) with ESMTP id 0D7084000C for ; Mon, 13 Feb 2023 04:54:14 +0000 (UTC) Authentication-Results: imf04.hostedemail.com; dkim=pass header.d=rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=qYf8FTmW; spf=pass (imf04.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.47 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1676264055; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=o6mU7eTgSI6j468x6JlFr8IfE22BslDPe1KItKKWUgQ=; b=7ElJO157b0QclpDgzi7y9qzlO4fiS8XZjnOJ2TUwT6R+RdplKm0xS5yHy2TITsZH/zSlks IW5UP/sK0iAdqJGwuTXOv92yzVL9orR6306GfnE4SwIXLDMZQjiywtu36Bqx7rSWVzUVZK MFRueUExIxrdDGg/e/p7r2q3jrjqo8A= ARC-Authentication-Results: i=1; imf04.hostedemail.com; dkim=pass header.d=rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=qYf8FTmW; spf=pass (imf04.hostedemail.com: domain of debug@rivosinc.com designates 209.85.216.47 as permitted sender) smtp.mailfrom=debug@rivosinc.com; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1676264055; a=rsa-sha256; cv=none; b=MOAksbG5lzy+XJZynQUbW7ua5JI7bDxNpKxxl09SNN7Nj4C97uiczoosmh62auqKhTy1oH kI13uC0GqPWLY7DdLhLAJnbTdzwfgKjfw7uoxSzowSsXSiGiKFnkvyRiVQbc2lAD+gl0LT BhTSThTmnWJSuS+h0Vpb0vhwKAEz5Zs= Received: by mail-pj1-f47.google.com with SMTP id f16-20020a17090a9b1000b0023058bbd7b2so11042953pjp.0 for ; Sun, 12 Feb 2023 20:54:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=o6mU7eTgSI6j468x6JlFr8IfE22BslDPe1KItKKWUgQ=; b=qYf8FTmWzIZq1sj/cRWNqkDlyaUrlHtAkUn706G2DjlsOFiB0iWKuqtT+MxmEI3t6T Ff0DhMKpSFR6ca05rAxMPooGPzA1kFOzhjYrqNY3J0Ka4Zz14ybBi+36q/CVw1rjCcJQ s21yu/DiDLNr4UUmwy6Wsgi9sOq9iax7KYKB0pZOhEhM5LpPkR5ngeHS/g47Fh7aN/AI cMC9Y8a3hzHTiL32AkRANplY0UlHrCUshHymlqQKPn6qaw5BdiwO3FgxJ0F1Iu/SSLhy 5pCenej/IO1VFA3WT/JAMOuCLszHyDZbQ8niFlM4YacqhxIEIz1YG6akTVFEeYQFxrxP 0ULQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=o6mU7eTgSI6j468x6JlFr8IfE22BslDPe1KItKKWUgQ=; b=WdTWZfQVvvkOB9kCzB5LJIvzT578px+aV85/9/Qr8xcWeN6cVPDMP0LUymYk7hMRUR SSOghUWtSdZAUJF2nf7qZLkiKBKXCaNqMOVYWRgwQZiXIXLJEGDo1MLKJAQx5Sefb+tJ lQwnqRstJWR9wHCBFfbDTGIXDaGabeVhkagRiDlqMfXvzklNetgk2kp6DF5yGUJM+1MX 6YnNQ7GoX0ouk9J4AHvUq27MNU6+hLgjBGOcivdZ8taR+EXU6gssSNSqG1QVFPcRsnuh zjuRTgK5SsMh0V9rpdVzk8qB0JD9WtWHJFICF/FmQpWDSkeNl5/8WKO1O+/n1bOLPtu3 7krw== X-Gm-Message-State: AO0yUKVJYYUn8eL6bSFwzjJHb6mQQCv820Vfw4HaIu7AunUkAlC5+5bg 0uEyrEGdVh9ZT4v0NlkttBv44cdQw/UACOJe X-Google-Smtp-Source: AK7set8HPfJbTibzxMHxoi7mMOcMVGZORNN77Z7301T7+NMj1/NsI1Getj9LRbOMwSbpaixi5cPnoA== X-Received: by 2002:a17:903:1c2:b0:198:e1b8:9476 with SMTP id e2-20020a17090301c200b00198e1b89476mr29006123plh.15.1676264053898; Sun, 12 Feb 2023 20:54:13 -0800 (PST) Received: from debug.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id e5-20020a170902784500b00189e7cb8b89sm7078303pln.127.2023.02.12.20.54.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Feb 2023 20:54:13 -0800 (PST) From: Deepak Gupta To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook Cc: Deepak Gupta , linux-mm@kvack.org Subject: [PATCH v1 RFC Zisslpcfi 08/20] riscv: ELF header parsing in GNU property for riscv zisslpcfi Date: Sun, 12 Feb 2023 20:53:37 -0800 Message-Id: <20230213045351.3945824-9-debug@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230213045351.3945824-1-debug@rivosinc.com> References: <20230213045351.3945824-1-debug@rivosinc.com> MIME-Version: 1.0 X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: 0D7084000C X-Rspam-User: X-Stat-Signature: 3jcfnof77qddja8gw5guxe48p1e5meur X-HE-Tag: 1676264054-968824 X-HE-Meta: U2FsdGVkX19XjQs7DfR37ohEM4NP+om+OGqT2ejOUhnNUlzGwb6xA88A3A7jJP1OMOWa41y+K70yDjxPf7xXZ3mFnXprThTrdcx93ZbVLp+6ZB4auKSI7TiXGbCOJF+a0KFAqp+NeEdcH1kknx6xSPckEs4ld7nBH45DrsRHm7cgNBWA3aw8Uc/M30E75EtF1VeLGceS4ckbNFebfdObiOPxTKZ2fFDPJKKqpexFrCjXvk6KpgE/uTn6v3c8hjeStjTEA/7Z+pGcInd0JIAx3VnX+AoZRvmec5ASvSY1vM7nrVk3UHi00mSPgd6XUshNI/FH9RSKES9OAUHZlGgX+bsHGfM6GAffvMgS2VRC7ev7XzhXJkPr/+0RYVwwbCEQnS3fv+La+ua3MMNQSbbjYgq5TCzZDi0FAQr0XDV48KT65C1uISH4BzQCHf3lVYyeskeblohGvQQSTOTVTYEIqRUEFJYikTtbLxMYPbkKCUvphyYasss7sZDzRhRG74FnbXwhK0AW/c9TQoBrXwq2uPKMYD4imfifqsx0UChdtmM2QEW/A2Fj+xUPHN9VYPLapbyRspn55Fsj0xDQoVjUqLhwhxCTekVWrNw1Z0ZiHv/mVL20+/AARo93qD2xDPFCjkPcmElVDZ2oO3bFieQQwVmWinm07FHKQbqK74itl7SPZspQqKIMgiY5iejPYGwPFIJOWQMwYGymt8x4exBDdNVpGjmNf1842X3Z9REzXAmM/dj6ktldwF4D14DFvIfBlY8LhMWLGExLqx5mId6Ib98tuXXR27J7SKsDO6HL4dwTnEgUHbAM6iPq2NgvsyAr9p0moUVORLBMlG3AQehcVDv30ABEgOp8gb5u7G9avxCEpQ0oBmvbxmpPX+v2hrqEcxDfSoJ/xa4hyEOB4nnmKmMQboau9MWjfEncL6el4m2bWWL+mttrylxzOc1X61bKrIh6HR1eKStBOI2T0rX T9u1XsC5 d3+06emxf/92mTpTCrBCG23+NtXEwtPxk1kqK8XYTdLh2Nn0zEWEMsSQ5sCEVqamU3FwyDARxj5n+SWHDg9eHYDK4UdHxMZR7MMIPUqM6yg6K5+2NnAl3lZmnkvugPgM0uLfzrFP0ALtVWQli4Sss8y2UKzGQSTdKpMIB0rw3FxLZIV2GM4lW1HdRdbkLwITqX5JTCsskVxajFh0WXzXbKFknmY6jhrDDFChO+COYGtoq5jzv/t0GwByNdN/uQMU34ztr4prTZkPu5xj6JSOu7xwkZBj4WlCqmOgwf8NCkh27qNgGlmLoWyC0546mCbU+snuhbXFQ2IWPid0CmezddCfIcxIOxYZD0hitbbC3GbEcT7+r9Ec6EYGeYjLSA0UOPQXgOnYv8R0fegOtKVTDPvZV4vrg9VXnCHZTkFirbbMtua2VgPrbHxRZGPbwMplvbUmR2YvIBbsKGLOrPaYvZQJhhQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Binaries enabled for Zisslpcfi will have new instructions that may fault on risc-v cpus which dont implement Zimops or Zicfi. This change adds - support for parsing new backward and forward cfi flags in PT_GNU_PROPERTY - setting cfi state on recognizing cfi flags in ELF - enable back cfi and forward cfi in sstatus Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/elf.h | 54 +++++++++++++++++++++++++++++ arch/riscv/kernel/process.c | 67 ++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index e7acffdf21d2..60ac2d2390ee 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -14,6 +14,7 @@ #include #include #include +#include /* * These are used to set parameters in the core dumps. @@ -140,4 +141,57 @@ extern int compat_arch_setup_additional_pages(struct linux_binprm *bprm, compat_arch_setup_additional_pages #endif /* CONFIG_COMPAT */ + +#define RISCV_ELF_FCFI (1 << 0) +#define RISCV_ELF_BCFI (1 << 1) + +#ifdef CONFIG_ARCH_BINFMT_ELF_STATE +struct arch_elf_state { + int flags; +}; + +#define INIT_ARCH_ELF_STATE { \ + .flags = 0, \ +} +#endif + +#ifdef CONFIG_ARCH_USE_GNU_PROPERTY +static inline int arch_parse_elf_property(u32 type, const void *data, + size_t datasz, bool compat, + struct arch_elf_state *arch) +{ + /* + * TODO: Do we want to support in 32bit/compat? + * may be return 0 for now. + */ + if (IS_ENABLED(CONFIG_COMPAT) && compat) + return 0; + if ((type & GNU_PROPERTY_RISCV_FEATURE_1_AND) == GNU_PROPERTY_RISCV_FEATURE_1_AND) { + const u32 *p = data; + + if (datasz != sizeof(*p)) + return -ENOEXEC; + if (arch_supports_indirect_br_lp_instr() && + (*p & GNU_PROPERTY_RISCV_FEATURE_1_FCFI)) + arch->flags |= RISCV_ELF_FCFI; + if (arch_supports_shadow_stack() && (*p & GNU_PROPERTY_RISCV_FEATURE_1_BCFI)) + arch->flags |= RISCV_ELF_BCFI; + } + return 0; +} + +static inline int arch_elf_pt_proc(void *ehdr, void *phdr, + struct file *f, bool is_interp, + struct arch_elf_state *state) +{ + return 0; +} + +static inline int arch_check_elf(void *ehdr, bool has_interp, + void *interp_ehdr, + struct arch_elf_state *state) +{ + return 0; +} +#endif #endif /* _ASM_RISCV_ELF_H */ diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 8955f2432c2d..db676262e61e 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -24,6 +24,7 @@ #include #include #include +#include register unsigned long gp_in_global __asm__("gp"); @@ -135,6 +136,14 @@ void start_thread(struct pt_regs *regs, unsigned long pc, else regs->status |= SR_UXL_64; #endif +#ifdef CONFIG_USER_SHADOW_STACK + if (current_thread_info()->user_cfi_state.ufcfi_en) + regs->status |= SR_UFCFIEN; +#endif +#ifdef CONFIG_USER_INDIRECT_BR_LP + if (current_thread_info()->user_cfi_state.ubcfi_en) + regs->status |= SR_UBCFIEN; +#endif } void flush_thread(void) @@ -189,3 +198,61 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) p->thread.sp = (unsigned long)childregs; /* kernel sp */ return 0; } + + +int allocate_shadow_stack(unsigned long *shadow_stack_base, unsigned long *shdw_size) +{ + int flags = MAP_ANONYMOUS | MAP_PRIVATE; + struct mm_struct *mm = current->mm; + unsigned long addr, populate, size; + *shadow_stack = 0; + + if (!shdw_size) + return -EINVAL; + + size = *shdw_size; + + /* If size is 0, then try to calculate yourself */ + if (size == 0) + size = round_up(min_t(unsigned long long, rlimit(RLIMIT_STACK), SZ_4G), PAGE_SIZE); + mmap_write_lock(mm); + addr = do_mmap(NULL, 0, size, PROT_SHADOWSTACK, flags, 0, + &populate, NULL); + mmap_write_unlock(mm); + if (IS_ERR_VALUE(addr)) + return PTR_ERR((void *)addr); + *shadow_stack_base = addr; + *shdw_size = size; + return 0; +} + +#if defined(CONFIG_USER_SHADOW_STACK) || defined(CONFIG_USER_INDIRECT_BR_LP) +/* gets called from load_elf_binary(). This'll setup shadow stack and forward cfi enable */ +int arch_elf_setup_cfi_state(const struct arch_elf_state *state) +{ + int ret = 0; + unsigned long shadow_stack_base = 0; + unsigned long shadow_stk_size = 0; + struct thread_info *info = NULL; + + info = current_thread_info(); + /* setup back cfi state */ + /* setup cfi state only if implementation supports it */ + if (arch_supports_shadow_stack() && (state->flags & RISCV_ELF_BCFI)) { + info->user_cfi_state.ubcfi_en = 1; + ret = allocate_shadow_stack(&shadow_stack_base, &shadow_stk_size); + if (ret) + return ret; + + info->user_cfi_state.user_shdw_stk = (shadow_stack_base + shadow_stk_size); + info->user_cfi_state.shdw_stk_base = shadow_stack_base; + } + /* setup forward cfi state */ + if (arch_supports_indirect_br_lp_instr() && (state->flags & RISCV_ELF_FCFI)) { + info->user_cfi_state.ufcfi_en = 1; + info->user_cfi_state.lp_label = 0; + } + + return ret; +} +#endif \ No newline at end of file