From patchwork Mon Feb 27 22:29:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgecombe, Rick P" X-Patchwork-Id: 13154262 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32548C64ED6 for ; Mon, 27 Feb 2023 22:32:22 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 7AB256B00A2; Mon, 27 Feb 2023 17:31:58 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 759236B00A3; Mon, 27 Feb 2023 17:31:58 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 585676B00A4; Mon, 27 Feb 2023 17:31:58 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 4638F6B00A2 for ; Mon, 27 Feb 2023 17:31:58 -0500 (EST) Received: from smtpin04.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay09.hostedemail.com (Postfix) with ESMTP id 284B780B6A for ; Mon, 27 Feb 2023 22:31:58 +0000 (UTC) X-FDA: 80514520716.04.99C99B3 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by imf24.hostedemail.com (Postfix) with ESMTP id 3CF0A180009 for ; Mon, 27 Feb 2023 22:31:56 +0000 (UTC) Authentication-Results: imf24.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=TxBni539; dmarc=pass (policy=none) header.from=intel.com; spf=pass (imf24.hostedemail.com: domain of rick.p.edgecombe@intel.com designates 192.55.52.136 as permitted sender) smtp.mailfrom=rick.p.edgecombe@intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1677537116; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references:dkim-signature; bh=lzo3Du4DYoE+b17QWEoI7riVHVFfp/EGQhzvABVyQ5w=; b=XPSUU0GTITuuPv/rhx9htBeWObhkptBdKFKCUKKU8/GTZ1hoccsub3ZaX5TvvQrMBX2Jbu 6AjSCMvo6VY/Z2x8/naQM5IvqZQGd5hGoPGn8nL+VP60Jyvl1ylmWJJR806mOYxAVaaRUr tz6s/bjgUDNdyPkC72O8nehMSDisuy8= ARC-Authentication-Results: i=1; imf24.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=TxBni539; dmarc=pass (policy=none) header.from=intel.com; spf=pass (imf24.hostedemail.com: domain of rick.p.edgecombe@intel.com designates 192.55.52.136 as permitted sender) smtp.mailfrom=rick.p.edgecombe@intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1677537116; a=rsa-sha256; cv=none; b=vOppUHgj0+Daah10gmwxYd64uIWh1dwmEayizinywExAUbJWxD2UWezbiHtoBHG8fjqQzr NzCShcYoiAP6tSXwtM1DAadAQC3rX+9iR6bgLD8yHEqQnI6DvaofO3TBzBI/i4U9mVN7bT TTkCv/YPr6BG57t4egsZ4VX+FO83H2g= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677537116; x=1709073116; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=EFxkXhIou5r9xim+54dTmsDWNwff9pMdXLmKz8K9Fko=; b=TxBni539xjkuXvnQl43kXXKaR1fqXmmmUhUtYEbOTqigSkrLGIfetRR2 9hL1Vbc7K9Q2LEWNgdFa53wjQ2/IuzP5wCi8j28FXSxIeduRKUXhf2kW/ dQMqtNTpi5dUHmC7TEOtXl1XrkNvDKUkyAEJGL/EcuVpi9AKt4LBZxNNX zDQLua/2PivJVTmjU26eOQc2RDzVtttDzuRqcEzqDt97ZzNzuYx8SUmlv EZZ0c7hgB/IV8CXuOa9uDP3tk/lj8enRGPw0ON4rLrBJrOJTNgf/abNXp e6MEmfXtfnNDxieHAYAkhaJsunGiwJvBtQP+f44/n5zh4DPDGJCopTfnY Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10634"; a="313657766" X-IronPort-AV: E=Sophos;i="5.98,220,1673942400"; d="scan'208";a="313657766" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Feb 2023 14:31:32 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10634"; a="848024746" X-IronPort-AV: E=Sophos;i="5.98,220,1673942400"; d="scan'208";a="848024746" Received: from leonqu-mobl1.amr.corp.intel.com (HELO rpedgeco-desk.amr.corp.intel.com) ([10.209.72.19]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Feb 2023 14:31:29 -0800 From: Rick Edgecombe To: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , Weijiang Yang , "Kirill A . Shutemov" , John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com, akpm@linux-foundation.org, Andrew.Cooper3@citrix.com, christina.schimpe@intel.com, david@redhat.com, debug@rivosinc.com Cc: rick.p.edgecombe@intel.com, Yu-cheng Yu Subject: [PATCH v7 31/41] x86/shstk: Introduce routines modifying shstk Date: Mon, 27 Feb 2023 14:29:47 -0800 Message-Id: <20230227222957.24501-32-rick.p.edgecombe@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230227222957.24501-1-rick.p.edgecombe@intel.com> References: <20230227222957.24501-1-rick.p.edgecombe@intel.com> X-Rspamd-Queue-Id: 3CF0A180009 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: xapoajsc8ruodfddbu93ya64xyfdrfqn X-HE-Tag: 1677537116-940168 X-HE-Meta: U2FsdGVkX18s+YqWUCPOElINU+aac81XbVaTuSdTc8NsN3TNuZc/G6n7FbSlssO5HOHLSD7UynMqUXXWsnQxOdRtP3D+1kSNvrM4O1T5pk5X4oT8bVNad2gDTTHir4Z1s7xneWovfQ6Tc1JlBul43XKx4XlpAdOTeMIsG3BPgZHo+r3PL3XPy8PM+TGZcJ++Gu0DJodpgUs1VAxEhC8UaPBm5WhMQUNGO/ktTpk+oPSD6rN1sqDzMaFfG8lC0dBZ+jQSyCXMxZ2asHDe+65mWN4tLW077Dc/cx4cXEZOfdcruO0RIh8q24n0JPPTCMb944I9fuY1rLo+fyBz1mPH1W6bK5SNotRPsrKcoztEirrwlTLZMIwd1MX/E6he+5mLC2jifAcBtQ/qy2TE8CHALt9baH68v3nKsYOXnH2X4BiqaQ5pnLXlVkuPbEICNKCf9rxZxwfSqNQE5ZJXNcBB0YZ/KIol6HDm6ZOn7wBNW9fYCMbubqB5WzD4SETk+3iQGV9kOgbHBQUKl2mcMRf2qmQ6us6CmfjNntVaZlne38R2wdHNR7SVJ/rBmk7u6TK3SKffmaJz2kWSognB4yAiWmVjK7KA+fkKCbien1QsF6TzpA6pAnQAhKDsB2Es4TEeUnKPIQQ0SRLW8Kb2B2XYhQJhuix2G42OoNJuMPvDkx1pM/fyTE9xrd3TsL16xQ9l4UQUxbzM+S/DSth5q/YlDw6WLbF4GTLMezdUToJe5BHELpJy5KEswgutdQNN+b7dEELv1xer6582RECvAAI/ArQg3mUk2Yf+mY/49XD8s4BZRPh9MkWMGPd0MchzYkg+q3jm1Nt1VtO6fUIlW+F/1ss8e+lt6wayNnAIw7nn77kIIwGa+3z/1ervbeZSy8ftp7AYLxs3ROGg/M7j9uV94yVJaC7pZrYhoy/gQQnd1TrQblWfV5Mwc9D4gyq14Qp88Gm73Kfj/spMd80+ZkR YeZIRnbL SoO3xN4rN8nQnc9sSLoisatIdS2ZV9XoATekCWXO8goEvw9VL63haJEo58cf8nNBgnEc6VLrWMre2jmPOWyX26Mhns9+MQORHYH0o7xV5wO0dZyVym+/s8eRvyEZXBJ5838jtZxB32c9gk2hmDoEsee+/mCQX+w7xMc41DS5/tUQO0FOqhPDZ3E8nn9R1yOTbALtqNBnqqPQ6JBVzfHZlTEfgd0mCTpMgMHj6zCIr+jmHQF/bzNk2MNQOOoRrnYe+80AJFgEy1K2q8PVJCGER53+4LbK8KI2UNC32vnY8/8wPfA5iVTDqwsXO4BhQt17vwuzJokY3RNyKeGCWOtumP4fnf1s0ACfwH+96 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Yu-cheng Yu Shadow stacks are normally written to via CALL/RET or specific CET instructions like RSTORSSP/SAVEPREVSSP. However during some Linux operations the kernel will need to write to directly using the ring-0 only WRUSS instruction. A shadow stack restore token marks a restore point of the shadow stack, and the address in a token must point directly above the token, which is within the same shadow stack. This is distinctively different from other pointers on the shadow stack, since those pointers point to executable code area. Introduce token setup and verify routines. Also introduce WRUSS, which is a kernel-mode instruction but writes directly to user shadow stack. In future patches that enable shadow stack to work with signals, the kernel will need something to denote the point in the stack where sigreturn may be called. This will prevent attackers calling sigreturn at arbitrary places in the stack, in order to help prevent SROP attacks. To do this, something that can only be written by the kernel needs to be placed on the shadow stack. This can be accomplished by setting bit 63 in the frame written to the shadow stack. Userspace return addresses can't have this bit set as it is in the kernel range. It is also can't be a valid restore token. Tested-by: Pengfei Xu Tested-by: John Allen Tested-by: Kees Cook Acked-by: Mike Rapoport (IBM) Reviewed-by: Kees Cook Signed-off-by: Yu-cheng Yu Co-developed-by: Rick Edgecombe Signed-off-by: Rick Edgecombe Cc: Kees Cook --- v5: - Fix typo in commit log v3: - Drop shstk_check_rstor_token() - Fail put_shstk_data() if bit 63 is set in the data (Kees) - Add comment in create_rstor_token() (Kees) - Pull in create_rstor_token() changes from future patch (Kees) v2: - Add data helpers for writing to shadow stack. v1: - Use xsave helpers. --- arch/x86/include/asm/special_insns.h | 13 +++++ arch/x86/kernel/shstk.c | 73 ++++++++++++++++++++++++++++ 2 files changed, 86 insertions(+) diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index de48d1389936..d6cd9344f6c7 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -202,6 +202,19 @@ static inline void clwb(volatile void *__p) : [pax] "a" (p)); } +#ifdef CONFIG_X86_USER_SHADOW_STACK +static inline int write_user_shstk_64(u64 __user *addr, u64 val) +{ + asm_volatile_goto("1: wrussq %[val], (%[addr])\n" + _ASM_EXTABLE(1b, %l[fail]) + :: [addr] "r" (addr), [val] "r" (val) + :: fail); + return 0; +fail: + return -EFAULT; +} +#endif /* CONFIG_X86_USER_SHADOW_STACK */ + #define nop() asm volatile ("nop") static inline void serialize(void) diff --git a/arch/x86/kernel/shstk.c b/arch/x86/kernel/shstk.c index 1d30295e0066..13c02747386f 100644 --- a/arch/x86/kernel/shstk.c +++ b/arch/x86/kernel/shstk.c @@ -25,6 +25,8 @@ #include #include +#define SS_FRAME_SIZE 8 + static bool features_enabled(unsigned long features) { return current->thread.features & features; @@ -40,6 +42,35 @@ static void features_clr(unsigned long features) current->thread.features &= ~features; } +/* + * Create a restore token on the shadow stack. A token is always 8-byte + * and aligned to 8. + */ +static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) +{ + unsigned long addr; + + /* Token must be aligned */ + if (!IS_ALIGNED(ssp, 8)) + return -EINVAL; + + addr = ssp - SS_FRAME_SIZE; + + /* + * SSP is aligned, so reserved bits and mode bit are a zero, just mark + * the token 64-bit. + */ + ssp |= BIT(0); + + if (write_user_shstk_64((u64 __user *)addr, (u64)ssp)) + return -EFAULT; + + if (token_addr) + *token_addr = addr; + + return 0; +} + static unsigned long alloc_shstk(unsigned long size) { int flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_ABOVE4G; @@ -159,6 +190,48 @@ int shstk_alloc_thread_stack(struct task_struct *tsk, unsigned long clone_flags, return 0; } +static unsigned long get_user_shstk_addr(void) +{ + unsigned long long ssp; + + fpregs_lock_and_load(); + + rdmsrl(MSR_IA32_PL3_SSP, ssp); + + fpregs_unlock(); + + return ssp; +} + +static int put_shstk_data(u64 __user *addr, u64 data) +{ + if (WARN_ON_ONCE(data & BIT(63))) + return -EINVAL; + + /* + * Mark the high bit so that the sigframe can't be processed as a + * return address. + */ + if (write_user_shstk_64(addr, data | BIT(63))) + return -EFAULT; + return 0; +} + +static int get_shstk_data(unsigned long *data, unsigned long __user *addr) +{ + unsigned long ldata; + + if (unlikely(get_user(ldata, addr))) + return -EFAULT; + + if (!(ldata & BIT(63))) + return -EINVAL; + + *data = ldata & ~BIT(63); + + return 0; +} + void shstk_free(struct task_struct *tsk) { struct thread_shstk *shstk = &tsk->thread.shstk;