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[81.185.174.238]) by smtp.gmail.com with ESMTPSA id c16-20020adffb50000000b002d2f0e23acbsm24648wrs.12.2023.03.16.06.18.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 06:18:18 -0700 (PDT) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Frank Rowand , Mike Rapoport , Andrew Morton , Anup Patel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-mm@kvack.org Cc: Alexandre Ghiti , Andrew Jones Subject: [PATCH v8 1/4] riscv: Get rid of riscv_pfn_base variable Date: Thu, 16 Mar 2023 14:17:08 +0100 Message-Id: <20230316131711.1284451-2-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230316131711.1284451-1-alexghiti@rivosinc.com> References: <20230316131711.1284451-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: CAE6FC0019 X-Stat-Signature: uxxcgn9855aizsnfzd86i8amma7tb14d X-Rspam-User: X-HE-Tag: 1678972699-970957 X-HE-Meta: U2FsdGVkX18Ar3I6ssS3urW+08SpbLYBq4yDuEJiPll57zsA8UDjiM2QjfJOFEbDdq1nvCFrrDsYCrcz9wrljSM5jEIx7t6+2kJC5RWIPWznwVAJnoV6s/15haqKf0jq4CnYasZsGEI8u1rk7oME8iC92IGsRdYO3KJC8W9NpkF5WW065u4lfOUkRp9UEhut8mgdi5MQcopbIicBGzZ19IIuOmDuhabwBQEX07szhw/M/pTpgsTln2C7pGpdXGu2m4ryEsklrqXUm1Pcnq3avx282lKDenMriYYtYCeGybdfFog7RUK+6DTAi7k5WMuFlVHAMM/mQxKl6pBA46fn08zXVzshJzx27eJJMtpjaBTMXlcneXxrVwSO+8ihkm2ibUrdyEs73CFjTr/S63T4BFvwASCJZ4xMMHuyk3Guaxz9DkKFjiLwmfAY0PPp/VGML4/csGgdPM+II447mpEDxbWXI6czqab0mudq9NGnwKDMtifYANQSIeXXB98KBDk3pG9sYlLYvcukbxr86GOTsQIuD5GJ5FfnwyklqfB8thnXTsJTCOhH7DErrzUkWysyK+uKX1aDcncrJ07GnYer1WCi/Nop9r7MFvoL0abzV09u4BWZR3Id36vJXnkQfC3P0MRbAsP3H7zKwXPH/MzgM52pwHKICaTqyzAZg9dl+zkPCUf4OLnY6B1J4UKuPs9bXKhm+zHZpWjGTa7z/qvM3n6QFTAL0zrtEibjYkIzkw+5AMJ5X1bwjI2wFhzLlVVII+68mBO+D/lmHktHuQS9ULSjaci+IXOz2o6MY8c7AzwzGo7gfFgxk5Qpos+I1ZcGxUjkXtHxWQt6Ez9r+9Y75lVjE971p/SA3Ci9LWopo0kro7744kSjWZkrS9NfjL4mWbMSd+/cqA+AdNcuay+VZPhX0W/AaJni49M0sVbOrQu/Mt9uNj+OYWKi5XYjMhc8N4p+6FyefcAW0stN/4I w76hb3eg kC86MLzAFUHU/JGrujVOOsZT79QaajPHSmbUxIE3gRePI+7nVEK13NXQ7xyYujz9dB5NmZxbZEDb6TpQreIe6yvHaqlLPtassU1s3clmjRhaeDXjTM3PnhxwHwmlX2pmW9AzAwwOqbS7Hq2AkuDej8NUu8o1NZnMnXEvu+QwSCWuop+045GdUbdbB3pyfa71VCDMLvE8jFAEYSnPiar7DP1nmcPM1Csy2+uZhPJjBnxjgNFwyS7P72YS0e0xizisDapuWQFYg1BiWRoYeJ6Wt88JeMEcVw6ICx6D6YHGEuND3w8/CNNGCS8sUGupapluoVIywMbzBP2e8w6HJTxFIkuAKY/FqYzgMF0zO0Q0OD4A0oWGLtf704q/S0Sj1UpyGvuk+YFILJ7cj8KCLEQTNnyDPZ09Ew3TMAwIEYUujknXWxG1FpM/8T9wcyYx83QBQ65SMpvAqIpruKa14ddXPAiYeJZ1QmkAKlmcCzOzQzAtnvJpBbtZYDcAtyktmxG7IKwHYtib8d9TcE+UBIyq7M7kTO2cvqEvu5EiePGVQCoX8ZPDGbw7lGrYL1fWJ32QSI6oEaUl5PkhIWqiDfXmaKupArRh0L/izOYRoRaUyN7EJfd74E2RRsiEUyjGAV6dlqb9t0HDEK43B9H/Nt6Hkp0duSwWnPdFjG8VmUuB2odcsaTJVOiP8eWjkgViO/jB02HF8 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Use directly phys_ram_base instead, riscv_pfn_base is just the pfn of the address contained in phys_ram_base. Even if there is no functional change intended in this patch, actually setting phys_ram_base that early changes the behaviour of kernel_mapping_pa_to_va during the early boot: phys_ram_base used to be zero before this patch and now it is set to the physical start address of the kernel. But it does not break the conversion of a kernel physical address into a virtual address since kernel_mapping_pa_to_va should only be used on kernel physical addresses, i.e. addresses greater than the physical start address of the kernel. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Anup Patel Tested-by: Anup Patel --- arch/riscv/include/asm/page.h | 3 +-- arch/riscv/mm/init.c | 6 +----- 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h index 7fed7c431928..8dc686f549b6 100644 --- a/arch/riscv/include/asm/page.h +++ b/arch/riscv/include/asm/page.h @@ -91,8 +91,7 @@ typedef struct page *pgtable_t; #endif #ifdef CONFIG_MMU -extern unsigned long riscv_pfn_base; -#define ARCH_PFN_OFFSET (riscv_pfn_base) +#define ARCH_PFN_OFFSET (PFN_DOWN((unsigned long)phys_ram_base)) #else #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) #endif /* CONFIG_MMU */ diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 87f6a5d475a6..cc558d94559a 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -271,9 +271,6 @@ static void __init setup_bootmem(void) #ifdef CONFIG_MMU struct pt_alloc_ops pt_ops __initdata; -unsigned long riscv_pfn_base __ro_after_init; -EXPORT_SYMBOL(riscv_pfn_base); - pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; @@ -285,7 +282,6 @@ static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAG #ifdef CONFIG_XIP_KERNEL #define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops)) -#define riscv_pfn_base (*(unsigned long *)XIP_FIXUP(&riscv_pfn_base)) #define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir)) #define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte)) #define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir)) @@ -985,7 +981,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr; kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr; - riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr); + phys_ram_base = kernel_map.phys_addr; /* * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit