diff mbox series

x86/mm: Fix VDSO and VVAR placement on 5-level paging machines

Message ID 20230724155706.29900-1-kirill.shutemov@linux.intel.com (mailing list archive)
State New
Headers show
Series x86/mm: Fix VDSO and VVAR placement on 5-level paging machines | expand

Commit Message

kirill.shutemov@linux.intel.com July 24, 2023, 3:57 p.m. UTC 
Yingcong has noticed that on 5-level paging machine VDSO and VVAR VMAs
are placed above 47-bit border:

8000001a9000-8000001ad000 r--p 00000000 00:00 0                          [vvar]
8000001ad000-8000001af000 r-xp 00000000 00:00 0                          [vdso]

It might confused users who not aware about 5-level paging and expect
all userspace addresses to be under 47-bit border.

So far I only saw it triggered with ASLR disabled, but I guess it can be
also triggered with ASLR enabled if the layout gets randomized just right.

The problem happens due to custom placement for the VMAs in the VDSO
code: vdso_addr() tries to place them above stack and checks the result
against TASK_SIZE_MAX which is wrong. TASK_SIZE_MAX set to 56-bit border
on 5-level paging machines. Use DEFAULT_MAP_WINDOW instead.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Reported-by: Yingcong Wu <yingcong.wu@intel.com>
Fixes: b569bab78d8d ("x86/mm: Prepare to expose larger address space to userspace")
---
 arch/x86/entry/vdso/vma.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/x86/entry/vdso/vma.c b/arch/x86/entry/vdso/vma.c
index 11a5c68d1218..7645730dc228 100644
--- a/arch/x86/entry/vdso/vma.c
+++ b/arch/x86/entry/vdso/vma.c
@@ -299,8 +299,8 @@  static unsigned long vdso_addr(unsigned long start, unsigned len)
 
 	/* Round the lowest possible end address up to a PMD boundary. */
 	end = (start + len + PMD_SIZE - 1) & PMD_MASK;
-	if (end >= TASK_SIZE_MAX)
-		end = TASK_SIZE_MAX;
+	if (end >= DEFAULT_MAP_WINDOW)
+		end = DEFAULT_MAP_WINDOW;
 	end -= len;
 
 	if (end > start) {