| Message ID | 20230725061451.1231480-2-lienze@kylinos.cn (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add KFENCE support for LoongArch | expand |
Hi, Enze, On Tue, Jul 25, 2023 at 2:15 PM Enze Li <lienze@kylinos.cn> wrote: > > According to LoongArch documentation online, there are two types of address > translation modes: direct mapped address translation mode (direct mapped mode) > and page table mapped address translation mode (page table mapped mode). > > Currently, the upstream kernel only supports direct mapped mode. > This patch adds a function that determines whether page table mapped > mode should be used, and also adds the corresponding handler functions > for both modes. > > For more details on the two modes, see [1]. > > [1] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#virtual-address-space-and-address-translation-mode > > Signed-off-by: Enze Li <lienze@kylinos.cn> > --- > arch/loongarch/include/asm/page.h | 19 ++++++++++++++++++- > arch/loongarch/include/asm/pgtable.h | 2 ++ > arch/loongarch/mm/pgtable.c | 6 ++++++ > 3 files changed, 26 insertions(+), 1 deletion(-) > > diff --git a/arch/loongarch/include/asm/page.h b/arch/loongarch/include/asm/page.h > index 26e8dccb6619..e43a2385b2cd 100644 > --- a/arch/loongarch/include/asm/page.h > +++ b/arch/loongarch/include/asm/page.h > @@ -32,6 +32,7 @@ > > #include <linux/kernel.h> > #include <linux/pfn.h> > +#include <asm/cpu-features.h> > > /* > * It's normally defined only for FLATMEM config but it's > @@ -84,7 +85,23 @@ typedef struct { unsigned long pgprot; } pgprot_t; > #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x)) > > #define virt_to_pfn(kaddr) PFN_DOWN(PHYSADDR(kaddr)) > -#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) > + > +static inline bool is_tlb_addr(unsigned long kaddr) > +{ > + if (unlikely((kaddr & GENMASK(BITS_PER_LONG - 1, cpu_vabits)) == > + GENMASK(BITS_PER_LONG - 1, cpu_vabits))) > + return true; > + return false; I think this helper can simply "return (kaddr >= vm_map_base)"? If so, we can even remove this helper and use the simple condition in virt_to_page(). > +} > + > +#define dwm_virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) This should be "dmw", not "dwm", and since tlb_virt_to_page is in .c file, this one should also be there. Huacai > + > +#define virt_to_page(kaddr) \ > +({ \ > + is_tlb_addr((unsigned long)kaddr) ? \ > + tlb_virt_to_page((unsigned long)kaddr) : \ > + dwm_virt_to_page((unsigned long)kaddr); \ > +}) > > extern int __virt_addr_valid(volatile void *kaddr); > #define virt_addr_valid(kaddr) __virt_addr_valid((volatile void *)(kaddr)) > diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/asm/pgtable.h > index 38afeb7dd58b..98a0c98de9d1 100644 > --- a/arch/loongarch/include/asm/pgtable.h > +++ b/arch/loongarch/include/asm/pgtable.h > @@ -353,6 +353,8 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt > #define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1) > #define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) > > +inline struct page *tlb_virt_to_page(unsigned long kaddr); > + > extern pgd_t swapper_pg_dir[]; > extern pgd_t invalid_pg_dir[]; > > diff --git a/arch/loongarch/mm/pgtable.c b/arch/loongarch/mm/pgtable.c > index 36a6dc0148ae..20e7425d235d 100644 > --- a/arch/loongarch/mm/pgtable.c > +++ b/arch/loongarch/mm/pgtable.c > @@ -9,6 +9,12 @@ > #include <asm/pgtable.h> > #include <asm/tlbflush.h> > > +inline struct page *tlb_virt_to_page(unsigned long kaddr) > +{ > + return pte_page(*virt_to_kpte(kaddr)); > +} > +EXPORT_SYMBOL_GPL(tlb_virt_to_page); > + > pgd_t *pgd_alloc(struct mm_struct *mm) > { > pgd_t *ret, *init; > -- > 2.34.1 > >
diff --git a/arch/loongarch/include/asm/page.h b/arch/loongarch/include/asm/page.h index 26e8dccb6619..e43a2385b2cd 100644 --- a/arch/loongarch/include/asm/page.h +++ b/arch/loongarch/include/asm/page.h @@ -32,6 +32,7 @@ #include <linux/kernel.h> #include <linux/pfn.h> +#include <asm/cpu-features.h> /* * It's normally defined only for FLATMEM config but it's @@ -84,7 +85,23 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x)) #define virt_to_pfn(kaddr) PFN_DOWN(PHYSADDR(kaddr)) -#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) + +static inline bool is_tlb_addr(unsigned long kaddr) +{ + if (unlikely((kaddr & GENMASK(BITS_PER_LONG - 1, cpu_vabits)) == + GENMASK(BITS_PER_LONG - 1, cpu_vabits))) + return true; + return false; +} + +#define dwm_virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) + +#define virt_to_page(kaddr) \ +({ \ + is_tlb_addr((unsigned long)kaddr) ? \ + tlb_virt_to_page((unsigned long)kaddr) : \ + dwm_virt_to_page((unsigned long)kaddr); \ +}) extern int __virt_addr_valid(volatile void *kaddr); #define virt_addr_valid(kaddr) __virt_addr_valid((volatile void *)(kaddr)) diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/asm/pgtable.h index 38afeb7dd58b..98a0c98de9d1 100644 --- a/arch/loongarch/include/asm/pgtable.h +++ b/arch/loongarch/include/asm/pgtable.h @@ -353,6 +353,8 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt #define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1) #define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) +inline struct page *tlb_virt_to_page(unsigned long kaddr); + extern pgd_t swapper_pg_dir[]; extern pgd_t invalid_pg_dir[]; diff --git a/arch/loongarch/mm/pgtable.c b/arch/loongarch/mm/pgtable.c index 36a6dc0148ae..20e7425d235d 100644 --- a/arch/loongarch/mm/pgtable.c +++ b/arch/loongarch/mm/pgtable.c @@ -9,6 +9,12 @@ #include <asm/pgtable.h> #include <asm/tlbflush.h> +inline struct page *tlb_virt_to_page(unsigned long kaddr) +{ + return pte_page(*virt_to_kpte(kaddr)); +} +EXPORT_SYMBOL_GPL(tlb_virt_to_page); + pgd_t *pgd_alloc(struct mm_struct *mm) { pgd_t *ret, *init;
According to LoongArch documentation online, there are two types of address translation modes: direct mapped address translation mode (direct mapped mode) and page table mapped address translation mode (page table mapped mode). Currently, the upstream kernel only supports direct mapped mode. This patch adds a function that determines whether page table mapped mode should be used, and also adds the corresponding handler functions for both modes. For more details on the two modes, see [1]. [1] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#virtual-address-space-and-address-translation-mode Signed-off-by: Enze Li <lienze@kylinos.cn> --- arch/loongarch/include/asm/page.h | 19 ++++++++++++++++++- arch/loongarch/include/asm/pgtable.h | 2 ++ arch/loongarch/mm/pgtable.c | 6 ++++++ 3 files changed, 26 insertions(+), 1 deletion(-)