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Thu, 27 Jul 2023 14:26:52 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id c5-20020aa78c05000000b00682562b1549sm1912312pfd.24.2023.07.27.14.26.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jul 2023 14:26:52 -0700 (PDT) From: Charlie Jenkins To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: charlie@rivosinc.com, conor@kernel.org, paul.walmsley@sifive.com, palmer@rivosinc.com, aou@eecs.berkeley.edu, anup@brainfault.org, konstantin@linuxfoundation.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-mm@kvack.org, mick@ics.forth.gr, jrtc27@jrtc27.com, rdunlap@infradead.org, alexghiti@rivosinc.com Subject: [PATCH v8 1/4] RISC-V: mm: Restrict address space for sv39,sv48,sv57 Date: Thu, 27 Jul 2023 14:26:26 -0700 Message-ID: <20230727212647.4182407-2-charlie@rivosinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230727212647.4182407-1-charlie@rivosinc.com> References: <20230727212647.4182407-1-charlie@rivosinc.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: ACE3AC000D X-Stat-Signature: rwn496hnx856si6wqssfows73rr9pg67 X-HE-Tag: 1690493213-815851 X-HE-Meta: U2FsdGVkX1/mW/887vmy2PGjPbgzLnRCVpWvmAZxaQ8I/oo+VJ0JE+uXcDSbjXFHiAelZzQXZP6wsm9ZSQkjz5mJdWFrrCqoIoHtEc/lamc41tqO3VTlw7uttDoi7UajPXO3ipucPPZ9zq8h010z/t81BJDzM3inVblb5rffVVh9hhDZbffjW57lnmyd4H/GEz8U2pBvsTozh2CWXNOf0Dnrh4QWA3ejpP1otKHZnsKsZcdYtxm2lU5c2HsP37vYseFbdBQFh8/hoSboRGpXjIkKJPyqiqlXFAlf8ZiYeq5kovZhddUcs/dEuBuS7ub7sdCs0egvJ6b0bheWReuKSoZ+xd5kiYp7tvwaMEaeZOFAH+MTCpg2mPzU2IFX/sHO80mNNGg0U65jd7xpyDEN/L7lLLBOlLapcvKtxDz9hnZZCBVq47wjGsxjsng0aiiQ4XK0rk82s0SdKnJM7VpzDREEubjk7XaqYIvg4gMfjfGMtogCeMq3KyMWx891g2x7ECsxR925DpOKcP6K8pCXmnBUUWxN2eUWmzaRQo9IatNQ/RkWkK+BHa7fNmKais8FhRsOxfd+4lLsxlbo6yJIca75Jbz64FN83KKkRu4nOdtK1TM9Qid/MjwXZShwzRgMq5X7ZlzFc1JKMyVGg6OB3uwvTw6V2boYyGJavz20RK/KvboBF0m09BXQZfW2v2mztOGrffNS5vHl54mYLwc1n8SfT78rc+LsYYl82QVjhxuS+NWagd8lLGp20v/PJJoDmKrVJRLfvOhHOqKKkWnfa6h25DHzeCuhDrgRHMEmQ/MTILv9+UaM1vNhez86pnjfJRM7SQs49t/sC0JSey3VzRl23HmQ4aHgUWCS29bjE+6s0KwXvTDvtnE1UKA/+A0PiUcZ48CD6G21317a2DAoauzxDJ40qSwBe1XoasZ2WJANYVmpIHSYHWzcrLyp1OrY5NMBDvrzEBCllSVvz/L Iw7yDEFb 5U09gga+J2CBfS5yc+8PFP3fXEfc8ZL+kz1LpfkkuTz+nuHf0CuWWKfxW9ZEnOVCn4MdCeMrYW3Qp97Dmd65leJXtqClbeQKtAz8JCs6CI74JgM8OpexXerGQqu1VT0GNJGs2JRpoDq/3Tl05S3GXtoW1r5SAwiGj3vXUGdJ9Dyq5Asj+wY6AgRP48v70G1Bznd2jCJjzcWWQdQzcbssQstv4FnhB+DcgF7p4UtQSrC9O9jGIWDiIf3yZDqsLCCBHo+HIFnVyoRP5k+9/LK4hBEZXmPQ8HsjJ2goZITzHBxtBAOY4NUpKwk0NB34RlLdyIVbF0Rk4UUxTX9KrWxNq+Sun+beYPUoKSOw8UqsibN/AwBWR0sfsE4SzPb+Rfbhji81CWB/Jf+Dh/W19nXa8GIhn3T5I5DRsdIf9WLcezE5cu9nDC7WB6+JpC6oOsU47UCND X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Make sv48 the default address space for mmap as some applications currently depend on this assumption. A hint address passed to mmap will cause the largest address space that fits entirely into the hint to be used. If the hint is less than or equal to 1<<38, an sv39 address will be used. An exception is that if the hint address is 0, then a sv48 address will be used. After an address space is completely full, the next smallest address space will be used. Signed-off-by: Charlie Jenkins --- arch/riscv/include/asm/elf.h | 2 +- arch/riscv/include/asm/pgtable.h | 20 +++++++++++- arch/riscv/include/asm/processor.h | 52 ++++++++++++++++++++++++++---- 3 files changed, 66 insertions(+), 8 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index c24280774caf..5d3368d5585c 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -49,7 +49,7 @@ extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); * the loader. We need to make sure that it is out of the way of the program * that it will "exec", and that there is sufficient room for the brk. */ -#define ELF_ET_DYN_BASE ((TASK_SIZE / 3) * 2) +#define ELF_ET_DYN_BASE ((DEFAULT_MAP_WINDOW / 3) * 2) #ifdef CONFIG_64BIT #ifdef CONFIG_COMPAT diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 75970ee2bda2..c76a1ef094a4 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -63,8 +63,26 @@ * position vmemmap directly below the VMALLOC region. */ #ifdef CONFIG_64BIT +#define VA_BITS_SV39 39 +#define VA_BITS_SV48 48 +#define VA_BITS_SV57 57 + +#define VA_USER_SV39 (UL(1) << (VA_BITS_SV39 - 1)) +#define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1)) +#define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1)) + #define VA_BITS (pgtable_l5_enabled ? \ - 57 : (pgtable_l4_enabled ? 48 : 39)) + VA_BITS_SV57 : (pgtable_l4_enabled ? VA_BITS_SV48 : VA_BITS_SV39)) + +#ifdef CONFIG_COMPAT +#define MMAP_VA_BITS_64 ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS) +#define MMAP_MIN_VA_BITS_64 ((VA_BITS >= VA_BITS_SV39) ? VA_BITS_SV39 : VA_BITS) +#define MMAP_VA_BITS (test_thread_flag(TIF_32BIT) ? 32 : MMAP_VA_BITS_64) +#define MMAP_MIN_VA_BITS (test_thread_flag(TIF_32BIT) ? 32 : MMAP_MIN_VA_BITS_64) +#else +#define MMAP_VA_BITS ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS) +#define MMAP_MIN_VA_BITS ((VA_BITS >= VA_BITS_SV39) ? VA_BITS_SV39 : VA_BITS) +#endif #else #define VA_BITS 32 #endif diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index c950a8d9edef..e810244ea951 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -13,19 +13,59 @@ #include +#ifdef CONFIG_64BIT +#define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1)) +#define STACK_TOP_MAX TASK_SIZE_64 + +#define arch_get_mmap_end(addr, len, flags) \ +({ \ + unsigned long mmap_end; \ + typeof(addr) _addr = (addr); \ + if ((_addr) == 0 || (IS_ENABLED(CONFIG_COMPAT) && test_thread_flag(TIF_32BIT))) \ + mmap_end = DEFAULT_MAP_WINDOW; \ + else if ((_addr) >= VA_USER_SV57) \ + mmap_end = STACK_TOP_MAX; \ + else if ((((_addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \ + mmap_end = VA_USER_SV48; \ + else \ + mmap_end = VA_USER_SV39; \ + mmap_end; \ +}) + +#define arch_get_mmap_base(addr, base) \ +({ \ + unsigned long mmap_base; \ + typeof(addr) _addr = (addr); \ + typeof(base) _base = (base); \ + unsigned long rnd_gap = (_base) - DEFAULT_MAP_WINDOW; \ + if ((_addr) == 0 || (IS_ENABLED(CONFIG_COMPAT) && test_thread_flag(TIF_32BIT))) \ + mmap_base = (_base); \ + else if (((_addr) >= VA_USER_SV57) && (VA_BITS >= VA_BITS_SV57)) \ + mmap_base = VA_USER_SV57 + rnd_gap; \ + else if ((((_addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \ + mmap_base = VA_USER_SV48 + rnd_gap; \ + else \ + mmap_base = VA_USER_SV39 + rnd_gap; \ + mmap_base; \ +}) + +#else +#define DEFAULT_MAP_WINDOW TASK_SIZE +#define STACK_TOP_MAX TASK_SIZE +#endif +#define STACK_ALIGN 16 + +#define STACK_TOP DEFAULT_MAP_WINDOW + /* * This decides where the kernel will search for a free chunk of vm * space during mmap's. */ -#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) - -#define STACK_TOP TASK_SIZE #ifdef CONFIG_64BIT -#define STACK_TOP_MAX TASK_SIZE_64 +#define TASK_UNMAPPED_BASE PAGE_ALIGN((UL(1) << MMAP_MIN_VA_BITS) / 3) #else -#define STACK_TOP_MAX TASK_SIZE +#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) #endif -#define STACK_ALIGN 16 #ifndef __ASSEMBLY__