From patchwork Mon Jul 31 13:43:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 13334738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37BB5C001DE for ; Mon, 31 Jul 2023 13:52:33 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id C788E280050; Mon, 31 Jul 2023 09:52:32 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id C2826280023; Mon, 31 Jul 2023 09:52:32 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id B17BD280050; Mon, 31 Jul 2023 09:52:32 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id A1692280023 for ; Mon, 31 Jul 2023 09:52:32 -0400 (EDT) Received: from smtpin26.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id 71671B218D for ; Mon, 31 Jul 2023 13:52:32 +0000 (UTC) X-FDA: 81072046944.26.4EAE042 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by imf17.hostedemail.com (Postfix) with ESMTP id 836DD4001B for ; Mon, 31 Jul 2023 13:52:30 +0000 (UTC) Authentication-Results: imf17.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=c2PCj6t+; spf=pass (imf17.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org; dmarc=pass (policy=none) header.from=kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1690811550; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=GVW/Wb+UQgRbZFsiBWrQq9WDN9Jw1tFXrIhcblQEjIs=; b=zBG3PMBQ6Qy4Vjom2LLRSkgYyX3JAuywBqqN9tDB9dHna7CtPNd4UGdVNpEqilJ5GVYPv5 Ja12fwa3QNcGQF2BDh4Bh1iVh4S5W54FjLPIwX8DoLOynPCJjgTVu+I4mQnm1jdOPUCa24 0FabQK77L9NX4pqeSIHV8RkVpX+cAOo= ARC-Authentication-Results: i=1; imf17.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=c2PCj6t+; spf=pass (imf17.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org; dmarc=pass (policy=none) header.from=kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1690811550; a=rsa-sha256; cv=none; b=jolB/2SFgd2rvjqxygp2fab/vVXgvadeTJKpoa6E1J0oLhi20hVkcZ8wDuYhdW9HUGF6ie TMoj/YF2icM9KSyqJj06Vpy3Ckk1TZzHOtZKrNuSAfblWMe7cK3nCn190DNMWxZSHCtZYj RBlUukxdBXWruEviTSksZ43BRdDIr5k= Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id BD4546116D; Mon, 31 Jul 2023 13:52:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3FACCC433D9; Mon, 31 Jul 2023 13:52:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690811548; bh=sSLA8c9zD81mYMEEIJgpRALMzE62vMXK9V14WuQWjaE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=c2PCj6t+bB/6OlIwo8Tpv5EzvoqPZRN7PFTpzhVvReZ9cXCysOJzHp2TnfwcN46qX rgb+Ztuniedy0S1vMlqSZMDErnzPXdUYNZ1c17JM3+NbAxAxn1i6mvVKQPBLWLU0LD NHmVpcMTyyNfN4M/uck3wgbHbt08yAivn7xV4qrbFeNlyhVNLCTr8eVob9Z97mRTJ/ MW+JLtQutKhoMl3qfeLbEsdLd7NwmQMrGD8Ugz4msdBnYpJXVyFq8/I3IxpIH8/UUw 8xeQ73YgNGdrRCBFdDnz33kXRqlhKSB35IlOLWWVDoQhjOV/rCZ1do0lRpfrEgNpL2 1Y9kmk1XHEjsw== From: Mark Brown Date: Mon, 31 Jul 2023 14:43:25 +0100 Subject: [PATCH v3 16/36] arm64/traps: Handle GCS exceptions MIME-Version: 1.0 Message-Id: <20230731-arm64-gcs-v3-16-cddf9f980d98@kernel.org> References: <20230731-arm64-gcs-v3-0-cddf9f980d98@kernel.org> In-Reply-To: <20230731-arm64-gcs-v3-0-cddf9f980d98@kernel.org> To: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Arnd Bergmann , Oleg Nesterov , Eric Biederman , Kees Cook , Shuah Khan , "Rick P. Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-099c9 X-Developer-Signature: v=1; a=openpgp-sha256; l=6026; i=broonie@kernel.org; h=from:subject:message-id; bh=sSLA8c9zD81mYMEEIJgpRALMzE62vMXK9V14WuQWjaE=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBkx7wg3tbU/Jvi+aBnZbgu1wIt+l+iH6Qq5kpWaVbp uxALrEKJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZMe8IAAKCRAk1otyXVSH0D2JB/ 9kPL7Cuf95NJv1AQKOpMb/HS6lBnOqyovumdMehBGZCgSicHfn0mP0FLjCOdL4m2inLSFGncZVXtBM ZVjBjrivFLu1pQT2ACgCYbtTShUspT4GZBFKEZwC/rvdpCCJx7egz4NCw37ZFlW4Go/NXjpfUwNARt V7cHKNTJsRBhyyCpsNCi/DCpjc7lrsvUaShC2ZzB/Ecy1MqyKQhNdVNMQ3as3B9PIG5pDfc2PeFx6U Mvz+UkxgUQnnfoOHPJRvKoGf/RzALWBl9TCt/fJ7EK5e+Yh6TgXD4qn2B3rO21BhkRIfRd7LQccfNU a4PLqOVnYRvb1MAB83M4E5HC1/i1MF X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspamd-Queue-Id: 836DD4001B X-Rspam-User: X-Stat-Signature: br8kf8sm6sdermjt35nwxwt4ocxcxck4 X-Rspamd-Server: rspam01 X-HE-Tag: 1690811550-650568 X-HE-Meta: U2FsdGVkX1+EcqsUJeY7cqyPgZot3NAqfKpRWMEEF+e7R9Wl9lkDDnZ9Wy3tdkKmnw/VhLM7cF0ix0XMljYaY4tOGAIdFFzbF8cNEy2BVsJdXGLl/sCTKDYJ2YRhfbnejkGcxTviVcup/izKl1c7TKnC6yOTYfnaC2JYbgb3LqhmSTZSov0mEMVDer9gs0Wimo893DnfTsWlfqT3LKuDL9o8fJGh3QIXBKKaMz0mg6nmL6VBaDYXOy8WmDkFPBFcfG7zs5dh5+rY2aPC3xgYeCp81+KsScQqw+NPnVutGAPTctSermSIvAR+xhIb/gcbW3fBYCDaudPV5sl1ZMzV87HgjNIV7t4jDie6CIQTaBDoCbVzLYF0TwGcCsrhpAyBf/teX7Ts0rGZ+y+2PwBxZb3ADobAAQQRdCdnJWs4ZrRbukJiGJSV+n2vhyB0nr3RtECJbkI3L8Hdt+xHJ9KbEYhD2eNp75lz89ZHIxZLdlUI2wXxKXKsT6cXYAQwBSH1RZH6cg0zsMGxsWbIvssDhRMEfImVZydNuYCUYk0VsAASkw6JaPqfVcEv5PkQlMpa6DT6Vi2NCClXPchzxvGXPMxh+y70wm1EIjhpH5iyd2n6XjZqVZ2l2P3a/YaCcfXkZH1LNeP9Kg5a++SvcNadPkrrKIg6d2BiU4+/mgJuEfuN0mbq/BY1u0sGuY0pGiMPevxR7RpTDsh/4cNWo6PaorUTVfkQ73gM1SJ/vYHcx1NHN+E7xvhO0io4ktuvGEyZe/gXxLI5j0w10ooApnl59+ROn48tkHiuGMcydfirbIDyPX51rAMp/k+pzOA9Par3nAVhbk7WP2pUvg6LH5kubv7LeGz4tW03fpkZRFRA0jeYYuikDjocg+7NX/wnl+2wStAibBcyGSVKzSmV7H7gzzjarMfCLheBygZ/srNn4Ac/RbM5S3eOlYGHBuKU2RGq2gzuP9I6WRY5P4HWl7e sQ2/Tr9a fgfOB7XaNDC/o7tFrz+bnE9c/YNaRODIOLikW0QNinR5Z72TIdcAOyElB5hAbkeODfiBHF5TsA5NP3UfW9KOgrNeypcNGNUUJEsAoxCBjqn4vaHGhElPz05ecIktHxnarIM/z2hCBKIKObzfnjRy/FkJZhVXEoom3d83U+IciC0xVv2mDxwJIZAHDCAcdQtBzUAyK95kdJXI4ChaqHn3RZVs2exloMVU5iln2Ra8RvG/UAbH+S6MBg08DCs8c/mCIRv1trrNdybaKm28OZUX/1J1XUmFQtJYHjNraThpHPb+ZKQN3LBtjjdxx++fP0OCsKNnRaUqj1M6CgDTt1GaPWLegtImKm46bMB1SZTjHxTV+OtBUgw46LC+9DYp9lVdlzBgzLX7qebAuLZP+YQaAF31KexeCNlr+3MOkLIMM+Flf1ww= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: A new exception code is defined for GCS specific faults other than standard load/store faults, for example GCS token validation failures, add handling for this. These faults are reported to userspace as segfaults with code SEGV_CPERR (protection error), mirroring the reporting for x86 shadow stack errors. GCS faults due to memory load/store operations generate data aborts with a flag set, these will be handled separately as part of the data abort handling. Since we do not currently enable GCS for EL1 we should not get any faults there but while we're at it we wire things up there, treating any GCS fault as fatal. Signed-off-by: Mark Brown --- arch/arm64/include/asm/esr.h | 28 +++++++++++++++++++++++++++- arch/arm64/include/asm/exception.h | 2 ++ arch/arm64/kernel/entry-common.c | 23 +++++++++++++++++++++++ arch/arm64/kernel/traps.c | 11 +++++++++++ 4 files changed, 63 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index ae35939f395b..a87a8305051f 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -51,7 +51,8 @@ #define ESR_ELx_EC_FP_EXC32 (0x28) /* Unallocated EC: 0x29 - 0x2B */ #define ESR_ELx_EC_FP_EXC64 (0x2C) -/* Unallocated EC: 0x2D - 0x2E */ +#define ESR_ELx_EC_GCS (0x2D) +/* Unallocated EC: 0x2E */ #define ESR_ELx_EC_SERROR (0x2F) #define ESR_ELx_EC_BREAKPT_LOW (0x30) #define ESR_ELx_EC_BREAKPT_CUR (0x31) @@ -382,6 +383,31 @@ #define ESR_ELx_MOPS_ISS_SRCREG(esr) (((esr) & (UL(0x1f) << 5)) >> 5) #define ESR_ELx_MOPS_ISS_SIZEREG(esr) (((esr) & (UL(0x1f) << 0)) >> 0) +/* ISS field definitions for GCS */ +#define ESR_ELx_ExType_SHIFT (20) +#define ESR_ELx_ExType_MASK GENMASK(23, 20) +#define ESR_ELx_Raddr_SHIFT (10) +#define ESR_ELx_Raddr_MASK GENMASK(14, 10) +#define ESR_ELx_Rn_SHIFT (5) +#define ESR_ELx_Rn_MASK GENMASK(9, 5) +#define ESR_ELx_Rvalue_SHIFT 5 +#define ESR_ELx_Rvalue_MASK GENMASK(9, 5) +#define ESR_ELx_IT_SHIFT (0) +#define ESR_ELx_IT_MASK GENMASK(4, 0) + +#define ESR_ELx_ExType_DATA_CHECK 0 +#define ESR_ELx_ExType_EXLOCK 1 +#define ESR_ELx_ExType_STR 2 + +#define ESR_ELx_IT_RET 0 +#define ESR_ELx_IT_GCSPOPM 1 +#define ESR_ELx_IT_RET_KEYA 2 +#define ESR_ELx_IT_RET_KEYB 3 +#define ESR_ELx_IT_GCSSS1 4 +#define ESR_ELx_IT_GCSSS2 5 +#define ESR_ELx_IT_GCSPOPCX 6 +#define ESR_ELx_IT_GCSPOPX 7 + #ifndef __ASSEMBLY__ #include diff --git a/arch/arm64/include/asm/exception.h b/arch/arm64/include/asm/exception.h index ad688e157c9b..99caff458e20 100644 --- a/arch/arm64/include/asm/exception.h +++ b/arch/arm64/include/asm/exception.h @@ -57,6 +57,8 @@ void do_el0_undef(struct pt_regs *regs, unsigned long esr); void do_el1_undef(struct pt_regs *regs, unsigned long esr); void do_el0_bti(struct pt_regs *regs); void do_el1_bti(struct pt_regs *regs, unsigned long esr); +void do_el0_gcs(struct pt_regs *regs, unsigned long esr); +void do_el1_gcs(struct pt_regs *regs, unsigned long esr); void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr, struct pt_regs *regs); void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs); diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index 6b2e0c367702..4d86216962e5 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -400,6 +400,15 @@ static void noinstr el1_bti(struct pt_regs *regs, unsigned long esr) exit_to_kernel_mode(regs); } +static void noinstr el1_gcs(struct pt_regs *regs, unsigned long esr) +{ + enter_from_kernel_mode(regs); + local_daif_inherit(regs); + do_el1_gcs(regs, esr); + local_daif_mask(); + exit_to_kernel_mode(regs); +} + static void noinstr el1_dbg(struct pt_regs *regs, unsigned long esr) { unsigned long far = read_sysreg(far_el1); @@ -442,6 +451,9 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs) case ESR_ELx_EC_BTI: el1_bti(regs, esr); break; + case ESR_ELx_EC_GCS: + el1_gcs(regs, esr); + break; case ESR_ELx_EC_BREAKPT_CUR: case ESR_ELx_EC_SOFTSTP_CUR: case ESR_ELx_EC_WATCHPT_CUR: @@ -621,6 +633,14 @@ static void noinstr el0_mops(struct pt_regs *regs, unsigned long esr) exit_to_user_mode(regs); } +static void noinstr el0_gcs(struct pt_regs *regs, unsigned long esr) +{ + enter_from_user_mode(regs); + local_daif_restore(DAIF_PROCCTX); + do_el0_gcs(regs, esr); + exit_to_user_mode(regs); +} + static void noinstr el0_inv(struct pt_regs *regs, unsigned long esr) { enter_from_user_mode(regs); @@ -701,6 +721,9 @@ asmlinkage void noinstr el0t_64_sync_handler(struct pt_regs *regs) case ESR_ELx_EC_MOPS: el0_mops(regs, esr); break; + case ESR_ELx_EC_GCS: + el0_gcs(regs, esr); + break; case ESR_ELx_EC_BREAKPT_LOW: case ESR_ELx_EC_SOFTSTP_LOW: case ESR_ELx_EC_WATCHPT_LOW: diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 8b70759cdbb9..65dab959f620 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -500,6 +500,16 @@ void do_el1_bti(struct pt_regs *regs, unsigned long esr) die("Oops - BTI", regs, esr); } +void do_el0_gcs(struct pt_regs *regs, unsigned long esr) +{ + force_signal_inject(SIGSEGV, SEGV_CPERR, regs->pc, 0); +} + +void do_el1_gcs(struct pt_regs *regs, unsigned long esr) +{ + die("Oops - GCS", regs, esr); +} + void do_el0_fpac(struct pt_regs *regs, unsigned long esr) { force_signal_inject(SIGILL, ILL_ILLOPN, regs->pc, esr); @@ -884,6 +894,7 @@ static const char *esr_class_str[] = { [ESR_ELx_EC_MOPS] = "MOPS", [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)", [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)", + [ESR_ELx_EC_GCS] = "Guarded Control Stack", [ESR_ELx_EC_SERROR] = "SError", [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)", [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",