From patchwork Mon Jul 31 13:43:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 13334666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id E99D1C001DF for ; Mon, 31 Jul 2023 13:51:10 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 65C99280043; Mon, 31 Jul 2023 09:51:10 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 6343A280023; Mon, 31 Jul 2023 09:51:10 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 522A8280043; Mon, 31 Jul 2023 09:51:10 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 41182280023 for ; Mon, 31 Jul 2023 09:51:10 -0400 (EDT) Received: from smtpin11.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay09.hostedemail.com (Postfix) with ESMTP id 07BB180B36 for ; Mon, 31 Jul 2023 13:51:10 +0000 (UTC) X-FDA: 81072043500.11.89CD110 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by imf28.hostedemail.com (Postfix) with ESMTP id E8F29C001B for ; Mon, 31 Jul 2023 13:51:07 +0000 (UTC) Authentication-Results: imf28.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=ql0hB8s6; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf28.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1690811468; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=efWpO6kQZ4NBVvO+VRNIClHcValqnYdNn1UkQ+vSR1Q=; b=aSC+hoN9ybFmBm+CNFRoLozC5uo8LoLDjxgtM+VGH5g4di0/Ec1mEz936TywzpkCfGRLIg td1d2sWsSphU5ZCdRAg7fU0K6q7cSgCxR7AqKK5tKfGAQogJXBhkaGwc57Srl9c0hJiBVC jQ893/vhI/m1DAQOX95apeCPinlLnho= ARC-Authentication-Results: i=1; imf28.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=ql0hB8s6; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf28.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1690811468; a=rsa-sha256; cv=none; b=fp+zc10KQoM8Cu9ti0vy1fI+UdjsLWZ+qfaIO9VjKEsinb3TTuPsPopQBBboILi90PnUFa kAIwfNRrmukE1wQrsx1s/XjMrzqeE/t4SVpuWAc0G+NQ50zTgULfddYB2zDN+qYXP6Kww7 7vo7+I3nq7ECoWeb0oarX6TG5CyiZ6Y= Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2A7286116C; Mon, 31 Jul 2023 13:51:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6FBDAC433C7; Mon, 31 Jul 2023 13:51:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690811467; bh=JKDtvlLgCbRxcWm9rtPAv0aBzdkLrhP5DYKE0inZ7vs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ql0hB8s6fPzQbhnSzij/M9BYj7CMg3zEw7Naar1cRWx31EklXdXr/XUe7db8Ojheq 0TesnJ5ZWztgKmSLIGGI9JAMNcDwsiei63Ow7nme8utIDKa9NP2G3NkABPzfHMOUmO oPOA+oXZKrahY402ZGtD0hSPNNDOiZ4T3BC15Y6wWnrGtYDRr02KamonhVuRGExjCf g2LEEcdOkY6rDPfXEJDECEKdLBHofGHmkWUA0h/kz6CDuvRAye/kGjgb+dXnhMcvXC IeNtQ6i39kKBMw8F+Z6F31TThVr3RxV+kTU5OIEx31QjveV/BPjg+oZk78VFsvrnEl Bz8Od21FJ4DRw== From: Mark Brown Date: Mon, 31 Jul 2023 14:43:12 +0100 Subject: [PATCH v3 03/36] arm64/gcs: Document the ABI for Guarded Control Stacks MIME-Version: 1.0 Message-Id: <20230731-arm64-gcs-v3-3-cddf9f980d98@kernel.org> References: <20230731-arm64-gcs-v3-0-cddf9f980d98@kernel.org> In-Reply-To: <20230731-arm64-gcs-v3-0-cddf9f980d98@kernel.org> To: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Arnd Bergmann , Oleg Nesterov , Eric Biederman , Kees Cook , Shuah Khan , "Rick P. Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-099c9 X-Developer-Signature: v=1; a=openpgp-sha256; l=10156; i=broonie@kernel.org; h=from:subject:message-id; bh=JKDtvlLgCbRxcWm9rtPAv0aBzdkLrhP5DYKE0inZ7vs=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBkx7wWfcT7aNg1Tz5m3Z78Kop80wUP+T4jaY1Jf04p NNmpEp2JATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZMe8FgAKCRAk1otyXVSH0NypB/ oDlbXyvdmkWzvmo4uN7bxskA5ltPikfa1IWNZ8PAsgB3N9XpqK9YZ9TEgw08fvx2427xFxIftnjskf tYnD7uFsBdkKdHKfNKZg8ImtmPVYHPKE/qeu12fHq6J6UNDI2HPYom4v84AEzmZBJ4b6TlS9rhWQHW OtCCQLFc8BjQDO3oqTDxkg9GVxOrJu+NtmRPo7pFTOIVK2hN8DeFVbWUoJasacSrQAz0FblisAh4ZZ 0DkCy/uAmK/GFcGTR4jpxVeCmkkJ6i5U52nJnK4XvbJ4r036dxJQ9bQtA8hzgWuFUEQDATw05VrqLU pZa5IiaCJKwjmUv7vv7NIeiH8iMLfv X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspamd-Queue-Id: E8F29C001B X-Rspam-User: X-Rspamd-Server: rspam04 X-Stat-Signature: g9qiacdter8jc3zgnq9bf99y6adcpiy9 X-HE-Tag: 1690811467-465093 X-HE-Meta: U2FsdGVkX18EuDUuPSfvncFPXLkJH5CVblz/x831DT1cbdv6LSbagkkwsxlKjRwfOW6usYgwq9EwHn4U19RVm5l3xCg90bVAvwWa+/uOtiM4pFEF6R5s4NbsklHKyi10DOxseb7iNAkF1YeBggAsjvz/5IUAdg2/0GxU8Ry8O6jwpb0Dy0wOgLH9FWsmuXYAKhwTVgULHiNQV6jt7ntHmfwTD6ZJT4F0jY4ssmc7IrJKRVj1kvJOGf+zT0tAGpWJq0y50ErwRRuAN0rTTjrJPkrxDkSj6M8C6zkV/6SsDNWC3B9+MvX4lzIQgc/M5rIMKK1Ej68IOzx73ovkXvjt0rAxhuPgy3c61Mpls3U6n6HTTBHQXdM6t2nrAmMOv4ujyoxrQ1bmje1oezxfz31RQK4v2GhBIKSpcQffuI5r5TXnygTpzd2O3Rc7D62QJa9kPTvnMb3h13ZEvkxNVOzdGLappHR7hfK1ewkOUiQl9VM0mr55Dr9VXfvIDKiSkNHQNEw7kESqQEVk6ehcx+ifTt/NdzYiOk3TKX8E1ipdOrnn7H9di4VEBfpjvHrwfZoEnO/mG1+XMaBHFoDcRf9noN8ML+S0KbK2EbI/EU2hevDBNRDTmj92tW/XJjmm8p0XMG8sQ5Nlmiacyxxw4fBG0rYFnG78Os2HK7XxXjibdaKsz0i99UL2haJIO0BFST6LwVSVQbfPmZme0CdltxvvE+N3c4B000EZcdiMFIq9ySAkBc7EWg2sn5M9udiKSMt+3xETWIZSK+re40yFRyoccxtgCr4nhaXUCwxVJeuVnrlC18umpXc3wZP+DKCs3ZWGlKQWjOLun1O8axEoiC+VtmojfOht30XNnqiKXRckBmPI1gTXo+u0TtRf8cIa7uy7jslHlfcklgIgwRESzDFA5eARBs3ytgWguFXvcZ4U/NoGEUCSNsGXsQ2w027/XJ2BJQBk+l5c4u/bALCi3rL TPj2uzfy Po7GbkbAJzvug1SfuWxnBbZdsvaDYIf7QEzgkXJjPV0OKpI9ziHOP3pZuGzQcPrxoQ5nXj9m9qCXHxbyv/I9Lc89nam7/LNcLAgqqsbgo7pslqdZTv80iOFmo6A1Hcp+MHdNQXPckpg9qcf75de82e1cjooXFLqCXNg13NFnXPIcy6FvEsOFsYgkJylfJtsiwfB9CZGDovzWDWJIHA+2W159pnVII9OgtFjlor1JH2N/O/qjoiTTpma0AS3oEHbV44mv1G7zFgCV2ByClDevw0kiHdrX27KuEKq5QYFwYr9Ng0+ixR50igd2H8c/kuUrWyfBFTJrjSkBRu3ijK+FLYgguLPUnsnowS+E8IYkPvxe84HWlqQILTe+UVJ4E8HvdN0Eh1UVuy2yxlen0LYmIU3kbOyr7K9g267uLsl/HXK8qic4= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Add some documentation of the userspace ABI for Guarded Control Stacks. Signed-off-by: Mark Brown --- Documentation/arch/arm64/gcs.rst | 225 +++++++++++++++++++++++++++++++++++++ Documentation/arch/arm64/index.rst | 1 + 2 files changed, 226 insertions(+) diff --git a/Documentation/arch/arm64/gcs.rst b/Documentation/arch/arm64/gcs.rst new file mode 100644 index 000000000000..33f21bbcc2d7 --- /dev/null +++ b/Documentation/arch/arm64/gcs.rst @@ -0,0 +1,225 @@ +=============================================== +Guarded Control Stack support for AArch64 Linux +=============================================== + +This document outlines briefly the interface provided to userspace by Linux in +order to support use of the ARM Guarded Control Stack (GCS) feature. + +This is an outline of the most important features and issues only and not +intended to be exhaustive. + + + +1. General +----------- + +* GCS is an architecture feature intended to provide greater protection + against return oriented programming (ROP) attacks and to simplify the + implementation of features that need to collect stack traces such as + profiling. + +* When GCS is enabled a separate guarded control stack is maintained by the + PE which is writeable only through specific GCS operations. This + stores the call stack only, when a procedure call instruction is + performed the current PC is pushed onto the GCS and on RET the + address in the LR is verified against that on the top of the GCS. + +* When active current GCS pointer is stored in the system register + GCSPR_EL0. This is readable by userspace but can only be updated + via specific GCS instructions. + +* The architecture provides instructions for switching between guarded + control stacks with checks to ensure that the new stack is a valid + target for switching. + +* The functionality of GCS is similar to that provided by the x86 Shadow + Stack feature, due to sharing of userspace interfaces the ABI refers to + shadow stacks rather than GCS. + +* Support for GCS is reported to userspace via HWCAP2_GCS in the aux vector + AT_HWCAP2 entry. + +* GCS is enabled per thread. While there is support for disabling GCS + at runtime this should be done with great care. + +* GCS memory access faults are reported as normal memory access faults. + +* GCS specific errors (those reported with EC 0x2d) will be reported as + SIGSEGV with a si_code of SEGV_CPERR (control protection error). + +* GCS is supported only for AArch64. + +* On systems where GCS is supported GCSPR_EL0 is always readable by EL0 + regardless of the GCS configuration for the thread. + +* The architecture supports enabling GCS without verifying that return values + in LR match those in the GCS, the LR will be ignored. This is not supported + by Linux. + +* EL0 GCS entries with bit 63 set are reserved for use, one such use is defined + below for signals and should be ignored when parsing the stack if not + understood. + + +2. Enabling and disabling Guarded Control Stacks +------------------------------------------------- + +* GCS is enabled and disabled for a thread via the PR_SET_SHADOW_STACK_STATUS + prctl(), this takes a single flags argument specifying which GCS features + should be used. + +* When set PR_SHADOW_STACK_ENABLE flag allocates a Guarded Control Stack for + and enables GCS for the thread, enabling the functionality controlled by + GCSPRE0_EL1.{nTR, RVCHKEN, PCRSEL}. + +* When set the PR_SHADOW_STACK_PUSH flag enables the functionality controlled + by GCSCRE0_EL1.PUSHMEn, allowing explicit GCS pushes. + +* When set the PR_SHADOW_STACK_WRITE flag enables the functionality controlled + by GCSCRE0_EL1.STREn, allowing explicit stores to the Guarded Control Stack. + +* Any unknown flags will cause PR_SET_SHADOW_STACK_STATUS to return -EINVAL. + +* PR_LOCK_SHADOW_STACK_STATUS is passed a bitmask of features with the same + values as used for PR_SET_SHADOW_STACK_STATUS. Any future changes to the + status of the specified GCS mode bits will be rejected. + +* PR_LOCK_SHADOW_STACK_STATUS allows any bit to be locked, this allows + userspace to prevent changes to any future features. + +* PR_SET_SHADOW_STACK_STATUS and PR_LOCK_SHADOW_STACK_STATUS affect only the + thread the called them, any other running threads will be unaffected. + +* New threads inherit the GCS configuration of the thread that created them. + +* GCS is disabled on exec(). + +* The current GCS configuration for a thread may be read with the + PR_GET_SHADOW_STACK_STATUS prctl(), this returns the same flags that + are passed to PR_SET_SHADOW_STACK_STATUS. + +* If GCS is disabled for a thread after having previously been enabled then + the stack will remain allocated for the lifetime of the thread. At present + any attempt to reenable GCS for the thread will be rejected, this may be + revisited in future. + +* It should be noted that since enabling GCS will result in GCS becoming + active immediately it is not normally possible to return from the function + that invoked the prctl() that enabled GCS. It is expected that the normal + usage will be that GCS is enabled very early in execution of a program. + + + +3. Allocation of Guarded Control Stacks +---------------------------------------- + +* When GCS is enabled for a thread a new Guarded Control Stack will be + allocated for it of size RLIMIT_STACK / 2 or 2 gigabytes, whichever is + smaller. + +* When a new thread is created by a thread which has GCS enabled then a + new Guarded Control Stack will be allocated for the new thread with + half the size of the standard stack. + +* When a stack is allocated by enabling GCS or during thread creation then + the top 8 bytes of the stack will be initialised to 0 and GCSPR_EL0 will + be set to point to the address of this 0 value, this can be used to + detect the top of the stack. + +* Additional Guarded Control Stacks can be allocated using the + map_shadow_stack() system call. + +* Stacks allocated using map_shadow_stack() will have the top 8 bytes + set to 0 and the 8 bytes below that initialised with an architecturally + valid GCS cap value, this allows switching to these stacks using the + stack switch instructions provided by the architecture. + +* Stacks allocated using map_shadow_stack() must be larger than 16 bytes and + must be 16 bytes aligned. + +* When GCS is disabled for a thread the Guarded Control Stack initially + allocated for that thread will be freed. Note carefully that if the + stack has been switched this may not be the stack currently in use by + the thread. + + +4. Signal handling +-------------------- + +* A new signal frame record gcs_context encodes the current GCS mode and + pointer for the interrupted context on signal delivery. This will always + be present on systems that support GCS. + +* The record contains a flag field which reports the current GCS configuration + for the interrupted context as PR_GET_SHADOW_STACK_STATUS would. + +* The signal handler is run with the same GCS configuration as the interrupted + context. + +* When GCS is enabled for the interrupted thread a signal handling specific + GCS cap token will be written to the GCS, this is an architectural GCS cap + token with bit 63 set. The GCSPR_EL0 reported in the signal frame will + point to this cap token. + +* The signal handler will use the same GCS as the interrupted context. + +* When GCS is enabled on signal entry a frame with the address of the signal + return handler will be pushed onto the GCS, allowing return from the signal + handler via RET as normal. This will not be reported in the gcs_context in + the signal frame. + + +5. Signal return +----------------- + +When returning from a signal handler: + +* If there is a gcs_context record in the signal frame then the GCS flags + and GCSPR_EL0 will be restored from that context prior to further + validation. + +* If there is no gcs_context record in the signal frame then the GCS + configuration will be unchanged. + +* If GCS is enabled on return from a signal handler then GCSPR_EL0 must + point to a valid GCS signal cap record, this will be popped from the + GCS prior to signal return. + +* If the GCS configuration is locked when returning from a signal then any + attempt to change the GCS configuration will be treated as an error. This + is true even if GCS was not enabled prior to signal entry. + +* GCS may be disabled via signal return but any attempt to enable GCS via + signal return will be rejected. + + +7. ptrace extensions +--------------------- + +* A new regset NT_ARM_GCS is defined for use with PTRACE_GETREGSET and + PTRACE_SETREGSET. + +* Due to the complexity surrounding allocation and deallocation of stacks and + lack of practical application it is not possible to enable GCS via ptrace. + GCS may be disabled via the ptrace interface. + +* Other GCS modes may be configured via ptrace. + +* Configuration via ptrace ignores locking of GCS mode bits. + + +8. ELF coredump extensions +--------------------------- + +* NT_ARM_GCS notes will be added to each coredump for each thread of the + dumped process. The contents will be equivalent to the data that would + have been read if a PTRACE_GETREGSET of the corresponding type were + executed for each thread when the coredump was generated. + + + +9. /proc extensions +-------------------- + +* Guarded Control Stack pages will include "ss" in their VmFlags in + /proc//smaps. diff --git a/Documentation/arch/arm64/index.rst b/Documentation/arch/arm64/index.rst index d08e924204bf..dcf3ee3eb8c0 100644 --- a/Documentation/arch/arm64/index.rst +++ b/Documentation/arch/arm64/index.rst @@ -14,6 +14,7 @@ ARM64 Architecture booting cpu-feature-registers elf_hwcaps + gcs hugetlbpage kdump legacy_instructions