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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2023 11:53:27.1460 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f70f5930-8080-4575-a9bd-08dbce3e8247 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C8.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9231 X-Stat-Signature: nk66c7b5p8jigaj5yu593eo3qnes337t X-Rspamd-Server: rspam10 X-Rspamd-Queue-Id: 329BB8000D X-Rspam-User: X-HE-Tag: 1697457209-208221 X-HE-Meta: U2FsdGVkX1+QoFGrziS3JKBwgc84T0sYosVcdcxckJrxM12SeU3HnZvluv5nBdmQ3rkcWDjRLZlIJUf7Y7u9hsOrjG5gCHwRQDTq/gXxbpn3zndIwyhTaF8gwTeent5G+tKKvPjlEhqQzD4+z26nNTgDlIzPuWGXUBPgR62lfTwQXbYm/9rECjKGn8CsrK9oZHQ04McVKFFtlbVx2Oojy3HakHi3VXoDnjuAouv0qt/Yte24IsMXP6vp68pJh5a3VkmOoPD6GrlDTjKfdameWxvXdIf6R9EmMDziDfeJuGz3SLnUGRNE/R2E3FXBIXPWsoGaumbsdPXugliSoLeQmLJ9Dn3fOYWFWdodonVqCs3BG0pein+lwuGfmkSnQ7cjh3/2ErnwwLIWlzt53moZHxzjesplFWFZZQ767ZX3+jpwCw3H01PhAygASiyu0e8mGdwyV+tRU+7ym593xsomDk7cg13Lh59JxnWbwnWWUPuJo7MDkzSHsutQzDUInd1ntmdABl5pJfyEU8wq5akUba7AVL7blCYyLZj3joTWua4uzTLMFyMFAVcWSkiwAEKwjm6cU0Qrp7VuWPflGEsxBb2+qdNE5QUKrrtdi/hY5vBAT9ErRjo4iGGqP+Afw4gOCoVBb5sZ9E4wP+RB49C3QXsrfaS1czMoK0J+prHsatrSqilTENX9bnKzXPwpWnGZiDLeSijO7lwKQXhYYAmJ9vsJ50w/Xb0bA3bYLibQhUQ86Ic8BZQll28PZ4d4w3LV8v1AYP1i0z7irGf1c8q9DbbW7sJsn9mJU136MzaP0zR7ghGdoehl8A0+V5KtQy8InUPIkwtTLt+KT6uNA1I/Q87EjNQNWg4mpyGRgUa1ewuH7PPuvCHvG+kMpthRj1QyQusAg1b7FqUs0tz7RxgZks453Z3y/NGUiNJY0zLR6cyHNwZekgHxNf6KEgrKKLlPBNCj+3iR5Wv+3Ek9KWz f58/Burz 0FQImIMg1BrfUxNYE/sJ7rcqCDD9f4USmWhGqVDxULVqWUAkpAEFj5bUbr2yPzI7x39klBxAbV91Ib+ju0ALTFRq54ILymr303Fn74D1lYc6k9SMwviNWXhvl1bnSxuXjo6pfTQFx0jPiYKlrnuD7kI2z6JdY29etzODzGPR/v0GQzQr0q32vbz1KAoUOmN7pQrKORzDEWy+K0KQNT2Wnh7CQMvVuEiuRBIxVv/BqSDBBgqU7MMtNlKBW1ObOxMmP1K328YwkesKL7yVQYZFShELNKBg7b2f/i7JZGjJIwkIVIBloVB01aIa2kPxWR7xC2e/pjBOMuwsKeWkynDhQBmD3cHIo2vePi2V4/npN46Kr3FrqLP0NTzc6walzW2HWm5EHd2g+GascY7zHRh46TsXJ5la06yp7fS6B X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: In some cases the full 64-bit error code for the KVM page fault will be needed to determine things like whether or not a fault was for a private or shared guest page, so update related code to accept the full 64-bit value so it can be plumbed all the way through to where it is needed. The accessors of fault->error_code are changed as follows: - FNAME(page_fault): change to explicitly use lower_32_bits() since that is no longer done in kvm_mmu_page_fault() - kvm_mmu_page_fault(): explicit mask with PFERR_RSVD_MASK, PFERR_NESTED_GUEST_PAGE - mmutrace: changed u32 -> u64 Signed-off-by: Isaku Yamahata Link: https://lore.kernel.org/kvm/20230612042559.375660-1-michael.roth@amd.com/T/#mbd0b20c9a2cf50319d5d2a27b63f73c772112076 [mdr: drop references/changes to code not in current gmem tree, update commit message] Signed-off-by: Michael Roth --- arch/x86/kvm/mmu/mmu.c | 3 +-- arch/x86/kvm/mmu/mmu_internal.h | 4 ++-- arch/x86/kvm/mmu/mmutrace.h | 2 +- arch/x86/kvm/mmu/paging_tmpl.h | 2 +- 4 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index bcb812a7f563..686f88c263a9 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -5802,8 +5802,7 @@ int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 err } if (r == RET_PF_INVALID) { - r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, - lower_32_bits(error_code), false, + r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa, error_code, false, &emulation_type); if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) return -EIO; diff --git a/arch/x86/kvm/mmu/mmu_internal.h b/arch/x86/kvm/mmu/mmu_internal.h index 71ba4f833dc1..759c8b718201 100644 --- a/arch/x86/kvm/mmu/mmu_internal.h +++ b/arch/x86/kvm/mmu/mmu_internal.h @@ -190,7 +190,7 @@ static inline bool is_nx_huge_page_enabled(struct kvm *kvm) struct kvm_page_fault { /* arguments to kvm_mmu_do_page_fault. */ const gpa_t addr; - const u32 error_code; + const u64 error_code; const bool prefetch; /* Derived from error_code. */ @@ -280,7 +280,7 @@ enum { }; static inline int kvm_mmu_do_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, - u32 err, bool prefetch, int *emulation_type) + u64 err, bool prefetch, int *emulation_type) { struct kvm_page_fault fault = { .addr = cr2_or_gpa, diff --git a/arch/x86/kvm/mmu/mmutrace.h b/arch/x86/kvm/mmu/mmutrace.h index ae86820cef69..195d98bc8de8 100644 --- a/arch/x86/kvm/mmu/mmutrace.h +++ b/arch/x86/kvm/mmu/mmutrace.h @@ -260,7 +260,7 @@ TRACE_EVENT( TP_STRUCT__entry( __field(int, vcpu_id) __field(gpa_t, cr2_or_gpa) - __field(u32, error_code) + __field(u64, error_code) __field(u64 *, sptep) __field(u64, old_spte) __field(u64, new_spte) diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h index c85255073f67..2f60f68f5f2d 100644 --- a/arch/x86/kvm/mmu/paging_tmpl.h +++ b/arch/x86/kvm/mmu/paging_tmpl.h @@ -787,7 +787,7 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault * The bit needs to be cleared before walking guest page tables. */ r = FNAME(walk_addr)(&walker, vcpu, fault->addr, - fault->error_code & ~PFERR_RSVD_MASK); + lower_32_bits(fault->error_code) & ~PFERR_RSVD_MASK); /* * The page is not mapped by the guest. Let the guest handle it.