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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2023 11:54:09.9758 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f5e6cf73-ee29-40e9-93b8-08dbce3e9bcc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6408 X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: 96F28140007 X-Stat-Signature: aqjmzxidfrs7w5a6a4t46oftbuhoow54 X-Rspam-User: X-HE-Tag: 1697457259-183061 X-HE-Meta: U2FsdGVkX1+arKMbsWlvt03j3RWytWB6S0tfcUll7XGNHBSr6yxqavWLHg6gbY2j94ewXndU4xb3PfnrY9MpnS5rzD+sIrbWYCEAUJ5jjJRav2niugfykSVjQZ+5jMENQHTycNZ7lUdgA50OAchrj5+5K1+CHwc9U35l5svYfPV/NRe9NoSdnWY1aP63saUD8wMQgo3oHVIBRYDIn4mtEpLxFfbTZXTV1MvoqH/PJ9E6+RdRCGv3+/jM3OVbc6dmYkfTu77ykhOpBNXZ3TGzuuN2PcHCdQNohw9ZfKantTBMuHeCbh5wJul46Z9qJXWZLcIydcseXVbzfBtIBwa/x5fcCvvRxRPKDAbPRkei+NRmRWZj8v/NQ4q01ftyaZrwGqrijM7rv3s2M4bY1+K2VIsDfqmeVXE5mGiDOh3IKlcruO/aRUy2HX8JnYc0dGWUKWAsNo1I/nRrq67AsNY0j+28f4h+FysyVjYktysKEGKQLMsf9nxy+Odw5e4hu98BWmjv4ZMuB6SjnZ9QMQjYTubjO0AXx1QcyBRyRW7cvGqjT6ejjkKGeh3kV9vQQChE4ObYR8V7X6RfOYRCUa+AYqSnlP+3uEO8bKrcpqwc7vdsuEbSTsJ4rfKzzxEQ/dzMbl+8o3WaKfX3gF31i1RUeAjbMvFiUk5D1Cyyq30lTcDD6KSGjMBb8NOvLEBbZTelDyedIzJyuGcXYmW2vTh9azmAmRRjuqyjoUmCBriN3DjNjySylM/ZRlWZMZWRQ5ioWkkysFTY+KpBqzp8V5HMn6mTw1uNIXJzB4RXPvN+aR+XdzE//lkDBN8chAOHbVIz7wDGx0Gy/L/gqAfEVQXRQZK7BOi/cTx0PuRT5bRClM2nIFUc3QyittYKXSr0ShRW6ro7G8dUIngPanihe/c06Jk4GFrNzaHjUGC2G83IzKJjQqCgTMVbJ0NhqhmRMUDEDkA8ipiThiMUTQcVUKI cAb+O5DC anf7iwxPl5U7t/Xp9l1EODFfifhLhdpoFtuXRnzzjhnKz3V/3Gwq0XGxKYj4mPHcMOvTOyeHXHwvczucvuLzI05j2fel7MKY3/UCz7RLuE9F3Ag+7MFi7wuNX79xe+3Zzts8D8TewEAsKPIR3zVrq/sPB2ZyyRYZrktFjbeY15o5aZdsSVG9SEFEEnvPrjyBXwFwjGLptof63A/igvjTMI4cj4RjSmAvEy6alfjkr+WZdKAgk2+0ybw2qJvwoLXwyhKElDaRi70ERI1NDL5RwGRbmexsk2lUNWruHyZqhKHNz3rJdYrAnups5rUgvsBM2Nu5sz1STpJaUrHYAX/KHOFytSSmA3il2Olix/RS3RNhQ1FxgWQbOWrVv9g== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Brijesh Singh When SEV-SNP is enabled globally, the hardware places restrictions on all memory accesses based on the RMP entry, whether the hypervisor or a VM, performs the accesses. When hardware encounters an RMP access violation during a guest access, it will cause a #VMEXIT(NPF) with a number of additional bits set to indicate the reasons for the #NPF. Define those here. See APM2 section 16.36.10 for more details. Signed-off-by: Brijesh Singh Signed-off-by: Ashish Kalra [mdr: add some additional details to commit message] Signed-off-by: Michael Roth --- arch/x86/include/asm/kvm_host.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index cdc235277a6f..fa401cb1a552 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -253,9 +253,13 @@ enum x86_intercept_stage; #define PFERR_FETCH_BIT 4 #define PFERR_PK_BIT 5 #define PFERR_SGX_BIT 15 +#define PFERR_GUEST_RMP_BIT 31 #define PFERR_GUEST_FINAL_BIT 32 #define PFERR_GUEST_PAGE_BIT 33 #define PFERR_IMPLICIT_ACCESS_BIT 48 +#define PFERR_GUEST_ENC_BIT 34 +#define PFERR_GUEST_SIZEM_BIT 35 +#define PFERR_GUEST_VMPL_BIT 36 #define PFERR_PRESENT_MASK BIT(PFERR_PRESENT_BIT) #define PFERR_WRITE_MASK BIT(PFERR_WRITE_BIT) @@ -267,6 +271,10 @@ enum x86_intercept_stage; #define PFERR_GUEST_FINAL_MASK BIT_ULL(PFERR_GUEST_FINAL_BIT) #define PFERR_GUEST_PAGE_MASK BIT_ULL(PFERR_GUEST_PAGE_BIT) #define PFERR_IMPLICIT_ACCESS BIT_ULL(PFERR_IMPLICIT_ACCESS_BIT) +#define PFERR_GUEST_RMP_MASK BIT_ULL(PFERR_GUEST_RMP_BIT) +#define PFERR_GUEST_ENC_MASK BIT_ULL(PFERR_GUEST_ENC_BIT) +#define PFERR_GUEST_SIZEM_MASK BIT_ULL(PFERR_GUEST_SIZEM_BIT) +#define PFERR_GUEST_VMPL_MASK BIT_ULL(PFERR_GUEST_VMPL_BIT) #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ PFERR_WRITE_MASK | \