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Wed, 18 Oct 2023 15:51:06 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id r195-20020a4a37cc000000b00581e7506f2fsm641134oor.9.2023.10.18.15.51.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 15:51:06 -0700 (PDT) From: Charlie Jenkins Date: Wed, 18 Oct 2023 15:51:02 -0700 Subject: [PATCH v5 2/3] riscv: Add remaining module relocations MIME-Version: 1.0 Message-Id: <20231018-module_relocations-v5-2-dfee32d4dfc3@rivosinc.com> References: <20231018-module_relocations-v5-0-dfee32d4dfc3@rivosinc.com> In-Reply-To: <20231018-module_relocations-v5-0-dfee32d4dfc3@rivosinc.com> To: linux-riscv@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Cc: Eric Biederman , Kees Cook , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andreas Schwab , Emil Renner Berthing , Samuel Holland , Charlie Jenkins X-Mailer: b4 0.12.3 X-Rspamd-Queue-Id: A5B7540010 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: 43qdummiiikoggxecmd14bdgduy7mpem X-HE-Tag: 1697669467-271227 X-HE-Meta: U2FsdGVkX1/lqQMPo7a18VVutnHSRtqcpAyKHl4z5x4kgay8KHXJ3b0q855hUEdZR7bYJFdB8dRDcx868cFr3donpXk5onZmWVSUYgSKO1uSZOSB9ykZ8rUINAYSosKnfVe4zOr10xF2LMLHXgPxkoEx40tde7GkJRkVnSIGR8CeJyiILq2HeUKUM247eYsk8Q5TiB0XkZmHYp+XBixhWD6LxzP76OQe9MsFPXT4zgV7UIqOVgeTqKQWan6y4+mxEmgAUOKGdFgZ7HwyFDPZP+hAyGrCN4tYQleCzSvpN0rXyg4XZA70tOpYQyhrjdk6OEVHCdCg3IWK51njctREvog0y+6rVQfxjRE9qmUBkS69Qor6v7vJlYRVwMIt2+rsI4FbVOMUUDxfZ+7rEV02G0gBtw34cwBXo800tEr/mMOdBnOFpvumbZq7Iu2iufVRt/glTsAElJ9yguhXmf9i9DBQtLPVGiXdUTKqGgBhRRfFQQQx3O1mN62QusVEpLHmV8rfEtsz0V1cDTZioFHL6dkiaRCmEVccxC8rEsZQeE/bptrWzSyeTr8Jny+e0n37Av7f1h5ugR31wE2wnHXxZGWSTrsckXmBnHcoEC0zjI2X0+NGzCcM1kw+kv/Tn8jmjy4HTjv94NTIm6sbIibF4JiKzGJOsZL8wuU530Gq6NA1ffHJiVOfE++Uk95y+IVGBtOp6ZHpGLaJYpDyQIhvImWk8BcuSXkdQ0TKiUSR0jgXqpAjTPmP4DKVcnBRc5VzJJZdW1GRiuQXnh83FhqU5rHT2AaeUhUmzwW4Ac6WEA15Wq8a1ZxFJo5k1Bi2tX3E7U1gAzZvYqQSPU1AQdlGw4C6zYwtMW9JuCjdSFBBhVkqb0TYkdLf/wfW9i2ZRrhPlvINzR+RD9VUcxPMWZNi3WIeABlRCktLE0PnLcwSOzIvFqqKruigwZk4TrjfSKn+FWN0EEkPuclmdyqX26l eOAZpqRK PGn79P3Lzfw96uOvizQRK10SKQ3xZ3wj1MlLiYMuYTisgiVqCVGZnbeyVsuCR6y98QlQ322sA0dXW5R6AwxnvXHi/DXhcATPFbVT03t4cTrDTc9BIrPcU+2TvdBPQDr/bKbK5tzqxG76hQUxID8zdjMyIWCqmaV1EDwWiZizU066odx5zZmxKD0rdPYbv4vGfU5cvW/uoVf+vw0VoyGk1QiTLm+ATFLZvGHRbWsiAIaO5l8p9m/xQtxPFHxAm5UQQ4IMEHQvkKa0Qoo/m+yPwOmn+GJLWP4SvPlSPwN7ox8PA2jgMozjrthPmyV+isqXUv6cgEhA06uCcGdS2azjEXaeTSTfT03xlCwj9VktSx1IDNeZGU53mW5ItGcHMM5D+Q7r1eKMDZFgor8KrFExbL6wGPr5pvDZMBWjVwjm8smJ5fS6tZEvGbwI/KqEy6QgE3SkTGInSEvIa28w= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000207, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Add all final module relocations and add error logs explaining the ones that are not supported. Signed-off-by: Charlie Jenkins --- arch/riscv/include/uapi/asm/elf.h | 5 +- arch/riscv/kernel/module.c | 220 +++++++++++++++++++++++++++++++++----- 2 files changed, 199 insertions(+), 26 deletions(-) diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index d696d6610231..11a71b8533d5 100644 --- a/arch/riscv/include/uapi/asm/elf.h +++ b/arch/riscv/include/uapi/asm/elf.h @@ -49,6 +49,7 @@ typedef union __riscv_fp_state elf_fpregset_t; #define R_RISCV_TLS_DTPREL64 9 #define R_RISCV_TLS_TPREL32 10 #define R_RISCV_TLS_TPREL64 11 +#define R_RISCV_IRELATIVE 58 /* Relocation types not used by the dynamic linker */ #define R_RISCV_BRANCH 16 @@ -81,7 +82,6 @@ typedef union __riscv_fp_state elf_fpregset_t; #define R_RISCV_ALIGN 43 #define R_RISCV_RVC_BRANCH 44 #define R_RISCV_RVC_JUMP 45 -#define R_RISCV_LUI 46 #define R_RISCV_GPREL_I 47 #define R_RISCV_GPREL_S 48 #define R_RISCV_TPREL_I 49 @@ -93,6 +93,9 @@ typedef union __riscv_fp_state elf_fpregset_t; #define R_RISCV_SET16 55 #define R_RISCV_SET32 56 #define R_RISCV_32_PCREL 57 +#define R_RISCV_PLT32 59 +#define R_RISCV_SET_ULEB128 60 +#define R_RISCV_SUB_ULEB128 61 #endif /* _UAPI_ASM_RISCV_ELF_H */ diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index a9e94e939cb5..3a3d342c09be 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/module.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -269,6 +270,12 @@ static int apply_r_riscv_align_rela(struct module *me, void *location, return -EINVAL; } +static int apply_r_riscv_add8_rela(struct module *me, void *location, Elf_Addr v) +{ + *(u8 *)location += (u8)v; + return 0; +} + static int apply_r_riscv_add16_rela(struct module *me, void *location, Elf_Addr v) { @@ -290,6 +297,12 @@ static int apply_r_riscv_add64_rela(struct module *me, void *location, return 0; } +static int apply_r_riscv_sub8_rela(struct module *me, void *location, Elf_Addr v) +{ + *(u8 *)location -= (u8)v; + return 0; +} + static int apply_r_riscv_sub16_rela(struct module *me, void *location, Elf_Addr v) { @@ -311,31 +324,162 @@ static int apply_r_riscv_sub64_rela(struct module *me, void *location, return 0; } -static int (*reloc_handlers_rela[]) (struct module *me, void *location, - Elf_Addr v) = { - [R_RISCV_32] = apply_r_riscv_32_rela, - [R_RISCV_64] = apply_r_riscv_64_rela, - [R_RISCV_BRANCH] = apply_r_riscv_branch_rela, - [R_RISCV_JAL] = apply_r_riscv_jal_rela, - [R_RISCV_RVC_BRANCH] = apply_r_riscv_rvc_branch_rela, - [R_RISCV_RVC_JUMP] = apply_r_riscv_rvc_jump_rela, - [R_RISCV_PCREL_HI20] = apply_r_riscv_pcrel_hi20_rela, - [R_RISCV_PCREL_LO12_I] = apply_r_riscv_pcrel_lo12_i_rela, - [R_RISCV_PCREL_LO12_S] = apply_r_riscv_pcrel_lo12_s_rela, - [R_RISCV_HI20] = apply_r_riscv_hi20_rela, - [R_RISCV_LO12_I] = apply_r_riscv_lo12_i_rela, - [R_RISCV_LO12_S] = apply_r_riscv_lo12_s_rela, - [R_RISCV_GOT_HI20] = apply_r_riscv_got_hi20_rela, - [R_RISCV_CALL_PLT] = apply_r_riscv_call_plt_rela, - [R_RISCV_CALL] = apply_r_riscv_call_rela, - [R_RISCV_RELAX] = apply_r_riscv_relax_rela, - [R_RISCV_ALIGN] = apply_r_riscv_align_rela, - [R_RISCV_ADD16] = apply_r_riscv_add16_rela, - [R_RISCV_ADD32] = apply_r_riscv_add32_rela, - [R_RISCV_ADD64] = apply_r_riscv_add64_rela, - [R_RISCV_SUB16] = apply_r_riscv_sub16_rela, - [R_RISCV_SUB32] = apply_r_riscv_sub32_rela, - [R_RISCV_SUB64] = apply_r_riscv_sub64_rela, +static int dynamic_linking_not_supported(struct module *me, void *location, + Elf_Addr v) +{ + pr_err("%s: Dynamic linking not supported in kernel modules PC = %p\n", + me->name, location); + return -EINVAL; +} + +static int tls_not_supported(struct module *me, void *location, Elf_Addr v) +{ + pr_err("%s: Thread local storage not supported in kernel modules PC = %p\n", + me->name, location); + return -EINVAL; +} + +static int apply_r_riscv_sub6_rela(struct module *me, void *location, Elf_Addr v) +{ + *(u8 *)location = (*(u8 *)location - ((u8)v & 0x3F)) & 0x3F; + return 0; +} + +static int apply_r_riscv_set6_rela(struct module *me, void *location, Elf_Addr v) +{ + *(u8 *)location = ((*(u8 *)location & 0xc0) | ((u8)v & 0x3F)); + return 0; +} + +static int apply_r_riscv_set8_rela(struct module *me, void *location, Elf_Addr v) +{ + *(u8 *)location = (u8)v; + return 0; +} + +static int apply_r_riscv_set16_rela(struct module *me, void *location, + Elf_Addr v) +{ + *(u16 *)location = (u16)v; + return 0; +} + +static int apply_r_riscv_set32_rela(struct module *me, void *location, + Elf_Addr v) +{ + *(u32 *)location = (u32)v; + return 0; +} + +static int apply_r_riscv_32_pcrel_rela(struct module *me, void *location, + Elf_Addr v) +{ + *(u32 *)location = v - (unsigned long)location; + return 0; +} + +static int apply_r_riscv_plt32_rela(struct module *me, void *location, + Elf_Addr v) +{ + ptrdiff_t offset = (void *)v - location; + + if (!riscv_insn_valid_32bit_offset(offset)) { + /* Only emit the plt entry if offset over 32-bit range */ + if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) { + offset = (void *)module_emit_plt_entry(me, v) - location; + } else { + pr_err("%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n", + me->name, (long long)v, location); + return -EINVAL; + } + } + + *(u32 *)location = (u32)offset; + return 0; +} + +static int apply_r_riscv_set_uleb128(struct module *me, void *location, Elf_Addr v) +{ + /* + * Relocation is only performed if R_RISCV_SET_ULEB128 is followed by + * R_RISCV_SUB_ULEB128 so do computation there + */ + return 0; +} + +static int apply_r_riscv_sub_uleb128(struct module *me, void *location, Elf_Addr v) +{ + if (v >= 128) { + pr_err("%s: uleb128 must be in [0, 127] (not %ld) at PC = %p\n", + me->name, (unsigned long)v, location); + return -EINVAL; + } + + *(u32 *)location = (*(u32 *)location & ~((u32)127)) | (v & 127); + return 0; +} + +/* + * Relocations defined in the riscv-elf-psabi-doc. + * This handles static linking only. + */ +static int (*reloc_handlers_rela[])(struct module *me, u32 *location, + Elf_Addr v) = { + [R_RISCV_32] = apply_r_riscv_32_rela, + [R_RISCV_64] = apply_r_riscv_64_rela, + [R_RISCV_RELATIVE] = dynamic_linking_not_supported, + [R_RISCV_COPY] = dynamic_linking_not_supported, + [R_RISCV_JUMP_SLOT] = dynamic_linking_not_supported, + [R_RISCV_TLS_DTPMOD32] = dynamic_linking_not_supported, + [R_RISCV_TLS_DTPMOD64] = dynamic_linking_not_supported, + [R_RISCV_TLS_DTPREL32] = dynamic_linking_not_supported, + [R_RISCV_TLS_DTPREL64] = dynamic_linking_not_supported, + [R_RISCV_TLS_TPREL32] = dynamic_linking_not_supported, + [R_RISCV_TLS_TPREL64] = dynamic_linking_not_supported, + /* 12-15 undefined */ + [R_RISCV_BRANCH] = apply_r_riscv_branch_rela, + [R_RISCV_JAL] = apply_r_riscv_jal_rela, + [R_RISCV_CALL] = apply_r_riscv_call_rela, + [R_RISCV_CALL_PLT] = apply_r_riscv_call_plt_rela, + [R_RISCV_GOT_HI20] = apply_r_riscv_got_hi20_rela, + [R_RISCV_TLS_GOT_HI20] = tls_not_supported, + [R_RISCV_TLS_GD_HI20] = tls_not_supported, + [R_RISCV_PCREL_HI20] = apply_r_riscv_pcrel_hi20_rela, + [R_RISCV_PCREL_LO12_I] = apply_r_riscv_pcrel_lo12_i_rela, + [R_RISCV_PCREL_LO12_S] = apply_r_riscv_pcrel_lo12_s_rela, + [R_RISCV_HI20] = apply_r_riscv_hi20_rela, + [R_RISCV_LO12_I] = apply_r_riscv_lo12_i_rela, + [R_RISCV_LO12_S] = apply_r_riscv_lo12_s_rela, + [R_RISCV_TPREL_HI20] = tls_not_supported, + [R_RISCV_TPREL_LO12_I] = tls_not_supported, + [R_RISCV_TPREL_LO12_S] = tls_not_supported, + [R_RISCV_TPREL_ADD] = tls_not_supported, + [R_RISCV_ADD8] = apply_r_riscv_add8_rela, + [R_RISCV_ADD16] = apply_r_riscv_add16_rela, + [R_RISCV_ADD32] = apply_r_riscv_add32_rela, + [R_RISCV_ADD64] = apply_r_riscv_add64_rela, + [R_RISCV_SUB8] = apply_r_riscv_sub8_rela, + [R_RISCV_SUB16] = apply_r_riscv_sub16_rela, + [R_RISCV_SUB32] = apply_r_riscv_sub32_rela, + [R_RISCV_SUB64] = apply_r_riscv_sub64_rela, + /* 41-42 reserved for future standard use */ + [R_RISCV_ALIGN] = apply_r_riscv_align_rela, + [R_RISCV_RVC_BRANCH] = apply_r_riscv_rvc_branch_rela, + [R_RISCV_RVC_JUMP] = apply_r_riscv_rvc_jump_rela, + /* 46-50 reserved for future standard use */ + [R_RISCV_RELAX] = apply_r_riscv_relax_rela, + [R_RISCV_SUB6] = apply_r_riscv_sub6_rela, + [R_RISCV_SET6] = apply_r_riscv_set6_rela, + [R_RISCV_SET8] = apply_r_riscv_set8_rela, + [R_RISCV_SET16] = apply_r_riscv_set16_rela, + [R_RISCV_SET32] = apply_r_riscv_set32_rela, + [R_RISCV_32_PCREL] = apply_r_riscv_32_pcrel_rela, + [R_RISCV_IRELATIVE] = dynamic_linking_not_supported, + [R_RISCV_PLT32] = apply_r_riscv_plt32_rela, + [R_RISCV_SET_ULEB128] = apply_r_riscv_set_uleb128, + [R_RISCV_SUB_ULEB128] = apply_r_riscv_sub_uleb128, + /* 62-191 reserved for future standard use */ + /* 192-255 nonstandard ABI extensions */ }; int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, @@ -349,6 +493,9 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, unsigned int i, type; Elf_Addr v; int res; + bool uleb128_set_exists = false; + u32 *uleb128_set_loc; + unsigned long uleb128_set_sym_val; pr_debug("Applying relocate section %u to %u\n", relsec, sechdrs[relsec].sh_info); @@ -426,6 +573,29 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, me->name); return -EINVAL; } + } else if (type == R_RISCV_SET_ULEB128) { + if (uleb128_set_exists) { + pr_err("%s: riscv psABI requires the next ULEB128 relocation to come after a R_RISCV_SET_ULEB128 is an R_RISCV_SUB_ULEB128, not another R_RISCV_SET_ULEB128.\n", + me->name); + return -EINVAL; + } + uleb128_set_exists = true; + uleb128_set_loc = location; + uleb128_set_sym_val = + ((Elf_Sym *)sechdrs[symindex].sh_addr + + ELF_RISCV_R_SYM(rel[i].r_info)) + ->st_value + + rel[i].r_addend; + } else if (type == R_RISCV_SUB_ULEB128) { + if (uleb128_set_exists && uleb128_set_loc == location) { + /* Calculate set and subtraction */ + v = uleb128_set_sym_val - v; + } else { + pr_err("%s: R_RISCV_SUB_ULEB128 must always be paired with the first R_RISCV_SET_ULEB128 that comes before it. PC = %p\n", + me->name, location); + return -EINVAL; + } + uleb128_set_exists = false; } res = handler(me, location, v);