From patchwork Wed Nov 22 09:42:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 13464414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3F19C61D9C for ; Wed, 22 Nov 2023 09:45:25 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 63DC66B05B2; Wed, 22 Nov 2023 04:45:25 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 5ECB46B05B3; Wed, 22 Nov 2023 04:45:25 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 468B16B05B4; Wed, 22 Nov 2023 04:45:25 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id 3227F6B05B2 for ; Wed, 22 Nov 2023 04:45:25 -0500 (EST) Received: from smtpin12.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 0B9231A06FA for ; Wed, 22 Nov 2023 09:45:25 +0000 (UTC) X-FDA: 81485107410.12.36EAB2D Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by imf16.hostedemail.com (Postfix) with ESMTP id 25328180012 for ; Wed, 22 Nov 2023 09:45:22 +0000 (UTC) Authentication-Results: imf16.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=HdxWHgkS; spf=pass (imf16.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org; dmarc=pass (policy=none) header.from=kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1700646323; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=OMVGeJMiw8fMaWxcNSDT95DTRXpFwkThaBAazRFpyyM=; b=Qpx6yGGe82E8PejxR6MewQBIieLWRpA4rMhLunTHOJfNJY5ofa8uvOAYaeh9fICkpp5t/8 UQ2BS9GnJAmA+hcq+CwEt6VAcrUPLO0hxN3rpBFWoubkCp/Px3Qz23YpOLsFvEKmglXS+q QL0Xw6HN5Ef4X43hAJp/qYuhpyijKJQ= ARC-Authentication-Results: i=1; imf16.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=HdxWHgkS; spf=pass (imf16.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org; dmarc=pass (policy=none) header.from=kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1700646323; a=rsa-sha256; cv=none; b=fEJ8IQJXGvCOxk+B1Hb/y4LN61JbVPIw61moEzJFc4r7eYHH0TXcZAuqGPXIjh6MIOexJ8 QPlnkjj2z0q4SmZNHlSbJ10LORgRQS8llsVNhL87OOwf0nTjzv5BA/BuGu0dLxqkC2yWQq EOYLJxlublc7wsvNMRX9psVhAStzP+Y= Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 44F1461B74; Wed, 22 Nov 2023 09:45:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3C129C433CB; Wed, 22 Nov 2023 09:45:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1700646322; bh=xkbuSU3P8z04kIlYSUCRz7O7y1/tSlbAvMwotpjCBPk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HdxWHgkSs4SFLRZkLxTS8ApdtxYDE6ESk+4DkzcS0pHqww1toP/eM7xIeE51YKf7C EzB1y2Os8mFSF+wDsb+uqyAg/66WmovXFrqOoptTDEKFyb1gySVSXEoCi5vrCGSwiI eRbT7RoAhPw/YjlpIgZEN8fB1asMEPGD85s5jEW827GiRPesCDVkdMjCuO9lFOZsEf iiD8sK9QKZ8u9RCc7VI0dR7/dDfYEX031t1GbBgRAnjSjFQswZxxbb+FbpQK5yz43v wH5hwTd93/S6DZPtfY3i4+PBSiRrrHqm2TL3rXgRSuvKAMry3V4l9nqY3YN6nfIL6O u7krLo9/TeqsQ== From: Mark Brown Date: Wed, 22 Nov 2023 09:42:30 +0000 Subject: [PATCH v7 20/39] arm64/gcs: Context switch GCS state for EL0 MIME-Version: 1.0 Message-Id: <20231122-arm64-gcs-v7-20-201c483bd775@kernel.org> References: <20231122-arm64-gcs-v7-0-201c483bd775@kernel.org> In-Reply-To: <20231122-arm64-gcs-v7-0-201c483bd775@kernel.org> To: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Arnd Bergmann , Oleg Nesterov , Eric Biederman , Kees Cook , Shuah Khan , "Rick P. Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , Florian Weimer , Christian Brauner , Thiago Jung Bauermann , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-0438c X-Developer-Signature: v=1; a=openpgp-sha256; l=6699; i=broonie@kernel.org; h=from:subject:message-id; bh=xkbuSU3P8z04kIlYSUCRz7O7y1/tSlbAvMwotpjCBPk=; b=owGbwMvMwMWocq27KDak/QLjabUkhtTYs6zTqwzUVtu96LM3b9AszJB6vyrzRWA+m/qdvhb9e u2mPQs7GY1ZGBi5GGTFFFnWPstYlR4usXX+o/mvYAaxMoFMYeDiFICJ2B9l/8Pp6iqWpimsUvR4 bUSxv+CVpd/X8V9P8ZV25uqddOa655a5eb+7VuVyPy9PSfQ1dY2Rz9RpNapJ5JjX9Fn1tZqbfGZ 5kJlmofvZqxzV86vzp7gz/p9WsobfUmKG2QWjI2zKyh89K8587T4X+3apRG7wzW13s2sOKy7I1k /vMVogkX2j59CRJc6m6guEvY5+lSrv3HfWJ7pzuc5135zCLddiY8sz/sZlNypdOhF5pUz6o9fDY xP6U2/wPhOfaamiYDPHf+3sriO1J+fLl1ffOLyBy5vpHH+wv8fuDzozzrGl735+wGR9eb3hlssb r//8/qul1mVj0fwG/z2ph7/WT3iyLjRyXxzfPMGy/GnzAA== X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspamd-Queue-Id: 25328180012 X-Rspam-User: X-Stat-Signature: do4hy1kz6h683p4ya3hh6yarj1418af3 X-Rspamd-Server: rspam01 X-HE-Tag: 1700646322-693723 X-HE-Meta: U2FsdGVkX18zPxo1th3hTDPfadkEWLtIXPpWFZQAREezlAmd9+Btg3kY/8QDXDt7Vzyd/P1XhIRK2by7gW/z3wZ1EakL2CuetouVFXDB807bB6/QFz4qnrPz0GN96MpuVNX5iArnIj4OTquXWHB+P17fCfe7u14mGCMghQUKaKqebUN/tC5vp+FqROL0Owdvsq9bpazpguezzgX4forYspQI64Q1W7nAG3oJy69bdQ8J1Oa5IriUBQAC22M2HIS8X8PMenvQwWt9Dvq4NmMj9s9FwrZbXkoRcyG5tOoHCU8IxR6s+npEsNIA1XB8bL59x4N9KUmgqtXoVegV05UbPYgwhxDQxSxo/OVBZ4W1BDAogVCr5yB49aYuxjqiCoutuWHIzq7QVZ+Xh1LhpuhXWlonwxoNKoPaA/o2/PUWPAZZxBrQxmkTA3rMb8eLSakZl/aLrUiW1HhtqFjHC+AQIKervYp4/L+Mers24S8jZp1EDgX8Q05Har+1xLL+4AE4n680ikTSM3cHQ8VYQundZlAM/xiU7w47caHYpnhn/64hKStY4CquRt/5UTrj7yNxE7DlCfKbbtQxYv6zKm5dZYfYEOIwhIOnehIQ0R8nhF6mLYoqnq4YygE7erESlMXqqP5dkBNYfnHcQy52Ce6VUvZKfXI1ExDgTAu1b4emMF0/htptFS4LPxOfBM1dgYMk3NAsEzN1s8YPg6UyMh3dmGWggr0ykaiL9g8Gmv6ZAeqnXQC7k0pNmZ/GNLG5MvBmKm5RXlhjbC9Hxu5VEHS0fF6OlZ6+ftV4CRfj1hTQVg/KdiJP1ZvivS6KY6MU5oUeLJ7hJ4AX6mFoPs+dzmdA097KVITKEyKOxOWK++FJJMj7wok+aPWAw7ckVDjjhpoxovwIkiKqqg/Em3Yw8FYi1ev/oO+bxCBeYBRk+BUMpKhys2dAkXyddONHX2G0bdpx5baUiVtuU/ksiqImYkG UW/httUy RoAX1GsnCccvxDKwsaqROj5qe6ceMAfcmNg7GR2vtP7oxU6DP+wH7M4ewtAqZpEovyTjMimRfJWahjXjV9Z3pd8PyJQp1hnjI2x40JsKf+wIHhhGo883+zbxVLFD0NWIYOzoNMp+XU3by4tD/O27DTr1Vr9+C3MiC9EC9uZsdl2vmJ95bDj5v+bOiLA8naQ8tsyncoTV6tU3jiloMe4TYZ27eneBHScNgFtqPb02jPJtR57JhU5prejEmO0/MXoSstHnEIB689nDTZZoDF5+1117BTa19Uwi1KoIvxklCauN17K1JFNSNxGEkYD9apY43gedidNqpV7M6FHKVN0EObfDTatGjXuuEql4nEqaJw6nNmOM= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: There are two registers controlling the GCS state of EL0, GCSPR_EL0 which is the current GCS pointer and GCSCRE0_EL1 which has enable bits for the specific GCS functionality enabled for EL0. Manage these on context switch and process lifetime events, GCS is reset on exec(). Also ensure that any changes to the GCS memory are visible to other PEs and that changes from other PEs are visible on this one by issuing a GCSB DSYNC when moving to or from a thread with GCS. Since the current GCS configuration of a thread will be visible to userspace we store the configuration in the format used with userspace and provide a helper which configures the system register as needed. On systems that support GCS we always allow access to GCSPR_EL0, this facilitates reporting of GCS faults if userspace implements disabling of GCS on error - the GCS can still be discovered and examined even if GCS has been disabled. Signed-off-by: Mark Brown --- arch/arm64/include/asm/gcs.h | 24 ++++++++++++++++ arch/arm64/include/asm/processor.h | 6 ++++ arch/arm64/kernel/process.c | 56 ++++++++++++++++++++++++++++++++++++++ arch/arm64/mm/Makefile | 1 + arch/arm64/mm/gcs.c | 39 ++++++++++++++++++++++++++ 5 files changed, 126 insertions(+) diff --git a/arch/arm64/include/asm/gcs.h b/arch/arm64/include/asm/gcs.h index 7c5e95218db6..04594ef59dad 100644 --- a/arch/arm64/include/asm/gcs.h +++ b/arch/arm64/include/asm/gcs.h @@ -48,4 +48,28 @@ static inline u64 gcsss2(void) return Xt; } +#ifdef CONFIG_ARM64_GCS + +static inline bool task_gcs_el0_enabled(struct task_struct *task) +{ + return current->thread.gcs_el0_mode & PR_SHADOW_STACK_ENABLE; +} + +void gcs_set_el0_mode(struct task_struct *task); +void gcs_free(struct task_struct *task); +void gcs_preserve_current_state(void); + +#else + +static inline bool task_gcs_el0_enabled(struct task_struct *task) +{ + return false; +} + +static inline void gcs_set_el0_mode(struct task_struct *task) { } +static inline void gcs_free(struct task_struct *task) { } +static inline void gcs_preserve_current_state(void) { } + +#endif + #endif diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index e5bc54522e71..c28681cf9721 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -179,6 +179,12 @@ struct thread_struct { u64 sctlr_user; u64 svcr; u64 tpidr2_el0; +#ifdef CONFIG_ARM64_GCS + unsigned int gcs_el0_mode; + u64 gcspr_el0; + u64 gcs_base; + u64 gcs_size; +#endif }; static inline unsigned int thread_get_vl(struct thread_struct *thread, diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 7387b68c745b..fd80b43c2969 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -48,6 +48,7 @@ #include #include #include +#include #include #include #include @@ -271,12 +272,32 @@ static void flush_tagged_addr_state(void) clear_thread_flag(TIF_TAGGED_ADDR); } +#ifdef CONFIG_ARM64_GCS + +static void flush_gcs(void) +{ + if (!system_supports_gcs()) + return; + + gcs_free(current); + current->thread.gcs_el0_mode = 0; + write_sysreg_s(0, SYS_GCSCRE0_EL1); + write_sysreg_s(0, SYS_GCSPR_EL0); +} + +#else + +static void flush_gcs(void) { } + +#endif + void flush_thread(void) { fpsimd_flush_thread(); tls_thread_flush(); flush_ptrace_hw_breakpoint(current); flush_tagged_addr_state(); + flush_gcs(); } void arch_release_task_struct(struct task_struct *tsk) @@ -474,6 +495,40 @@ static void entry_task_switch(struct task_struct *next) __this_cpu_write(__entry_task, next); } +#ifdef CONFIG_ARM64_GCS + +void gcs_preserve_current_state(void) +{ + if (task_gcs_el0_enabled(current)) + current->thread.gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0); +} + +static void gcs_thread_switch(struct task_struct *next) +{ + if (!system_supports_gcs()) + return; + + gcs_preserve_current_state(); + + gcs_set_el0_mode(next); + write_sysreg_s(next->thread.gcspr_el0, SYS_GCSPR_EL0); + + /* + * Ensure that GCS changes are observable by/from other PEs in + * case of migration. + */ + if (task_gcs_el0_enabled(current) || task_gcs_el0_enabled(next)) + gcsb_dsync(); +} + +#else + +static void gcs_thread_switch(struct task_struct *next) +{ +} + +#endif + /* * ARM erratum 1418040 handling, affecting the 32bit view of CNTVCT. * Ensure access is disabled when switching to a 32bit task, ensure @@ -533,6 +588,7 @@ struct task_struct *__switch_to(struct task_struct *prev, ssbs_thread_switch(next); erratum_1418040_thread_switch(next); ptrauth_thread_switch_user(next); + gcs_thread_switch(next); /* * Complete any pending TLB or cache maintenance on this CPU in case diff --git a/arch/arm64/mm/Makefile b/arch/arm64/mm/Makefile index dbd1bc95967d..4e7cb2f02999 100644 --- a/arch/arm64/mm/Makefile +++ b/arch/arm64/mm/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_TRANS_TABLE) += trans_pgd.o obj-$(CONFIG_TRANS_TABLE) += trans_pgd-asm.o obj-$(CONFIG_DEBUG_VIRTUAL) += physaddr.o obj-$(CONFIG_ARM64_MTE) += mteswap.o +obj-$(CONFIG_ARM64_GCS) += gcs.o KASAN_SANITIZE_physaddr.o += n obj-$(CONFIG_KASAN) += kasan_init.o diff --git a/arch/arm64/mm/gcs.c b/arch/arm64/mm/gcs.c new file mode 100644 index 000000000000..b0a67efc522b --- /dev/null +++ b/arch/arm64/mm/gcs.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include + +#include +#include + +/* + * Apply the GCS mode configured for the specified task to the + * hardware. + */ +void gcs_set_el0_mode(struct task_struct *task) +{ + u64 gcscre0_el1 = GCSCRE0_EL1_nTR; + + if (task->thread.gcs_el0_mode & PR_SHADOW_STACK_ENABLE) + gcscre0_el1 |= GCSCRE0_EL1_RVCHKEN | GCSCRE0_EL1_PCRSEL; + + if (task->thread.gcs_el0_mode & PR_SHADOW_STACK_WRITE) + gcscre0_el1 |= GCSCRE0_EL1_STREn; + + if (task->thread.gcs_el0_mode & PR_SHADOW_STACK_PUSH) + gcscre0_el1 |= GCSCRE0_EL1_PUSHMEn; + + write_sysreg_s(gcscre0_el1, SYS_GCSCRE0_EL1); +} + +void gcs_free(struct task_struct *task) +{ + if (task->thread.gcs_base) + vm_munmap(task->thread.gcs_base, task->thread.gcs_size); + + task->thread.gcspr_el0 = 0; + task->thread.gcs_base = 0; + task->thread.gcs_size = 0; +}