Message ID | 20240329044459.3990638-8-debug@rivosinc.com (mailing list archive) |
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State | New |
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riscv control-flow integrity for usermode
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diff --git a/include/linux/mm.h b/include/linux/mm.h index f5a97dec5169..225af437ecba 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -352,7 +352,25 @@ extern unsigned int kobjsize(const void *objp); * for more details on the guard size. */ # define VM_SHADOW_STACK VM_HIGH_ARCH_5 -#else +#endif + +#ifdef CONFIG_RISCV_USER_CFI +/* + * On RISC-V pte encodings for shadow stack is R=0, W=1, X=0 and thus RISCV + * choosing to use similar mechanism on vm_flags where VM_WRITE only means + * VM_SHADOW_STACK. RISCV as well doesn't support VM_SHADOW_STACK to be set + * with VM_SHARED. + */ +#define VM_SHADOW_STACK VM_HIGH_ARCH_5 + +static inline bool arch_is_shadow_stack(vm_flags_t vm_flags) +{ + return (vm_flags & VM_SHADOW_STACK); +} + +#endif + +#ifndef VM_SHADOW_STACK # define VM_SHADOW_STACK VM_NONE #endif
VM_SHADOW_STACK is defined by x86 as vm flag to mark a shadow stack vma. x86 uses VM_HIGH_ARCH_5 bit but that limits shadow stack vma to 64bit only. arm64 follows same path https://lore.kernel.org/lkml/20231009-arm64-gcs-v6-12-78e55deaa4dd@kernel.org/#r To keep things simple, RISC-V follows the same. Signed-off-by: Deepak Gupta <debug@rivosinc.com> --- include/linux/mm.h | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-)