| Message ID | 20240417071847.29584-2-byungchul@sk.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Reduce tlb and interrupt numbers over 90% by improving folio migration | expand |
On Wed, Apr 17 2024 at 16:18, Byungchul Park wrote: > This is a preparation for migrc mechanism that needs to recognize > read-only tlb entries during migration by separating tlb batch arch data > into two, one is for read-only entries and the other is for writable > ones, and merging those two when needed. I have no idea what migrc mechanism means. Please add enough context into the change log so the reviewer does not have to go through loops and hoops to figure out what this is about. Thanks, tglx
On Fri, Apr 19, 2024 at 07:36:14AM +0200, Thomas Gleixner wrote: > On Wed, Apr 17 2024 at 16:18, Byungchul Park wrote: > > This is a preparation for migrc mechanism that needs to recognize > > read-only tlb entries during migration by separating tlb batch arch data > > into two, one is for read-only entries and the other is for writable > > ones, and merging those two when needed. > > I have no idea what migrc mechanism means. Please add enough context > into the change log so the reviewer does not have to go through loops > and hoops to figure out what this is about. I will add a simple description explaining 'what migrc is' at every patch mentioning migrc, from the next spin. Thank you for the advice. JFYI, you can see what migrc is in the following link: https://lore.kernel.org/lkml/20240418061536.11645-1-byungchul@sk.com/ Byungchul > Thanks, > > tglx
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 25726893c6f4..a14f77c5cdde 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -5,6 +5,7 @@ #include <linux/mm_types.h> #include <linux/mmu_notifier.h> #include <linux/sched.h> +#include <linux/cpumask.h> #include <asm/processor.h> #include <asm/cpufeature.h> @@ -293,6 +294,23 @@ static inline void arch_flush_tlb_batched_pending(struct mm_struct *mm) extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); +static inline void arch_tlbbatch_clear(struct arch_tlbflush_unmap_batch *batch) +{ + cpumask_clear(&batch->cpumask); +} + +static inline void arch_tlbbatch_fold(struct arch_tlbflush_unmap_batch *bdst, + struct arch_tlbflush_unmap_batch *bsrc) +{ + cpumask_or(&bdst->cpumask, &bdst->cpumask, &bsrc->cpumask); +} + +static inline bool arch_tlbbatch_done(struct arch_tlbflush_unmap_batch *bdst, + struct arch_tlbflush_unmap_batch *bsrc) +{ + return !cpumask_andnot(&bdst->cpumask, &bdst->cpumask, &bsrc->cpumask); +} + static inline bool pte_flags_need_flush(unsigned long oldflags, unsigned long newflags, bool ignore_access)
This is a preparation for migrc mechanism that needs to recognize read-only tlb entries during migration by separating tlb batch arch data into two, one is for read-only entries and the other is for writable ones, and merging those two when needed. Migrc also needs to optimize tlb shootdown by skipping CPUs that have already performed tlb flush needed for a while. To support it, added APIs manipulating arch data for x86. Signed-off-by: Byungchul Park <byungchul@sk.com> --- arch/x86/include/asm/tlbflush.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)