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AJvYcCXqzIBW4TC38mAuy+laopN0DfiPNx35H7ER5LPQgG2kV+ELJTxTwNotldFzzM6pQ/xGmKYmgGzEp+Xh6maP99xuOoo= X-Gm-Message-State: AOJu0YwEsmn1S1WX5FQ5wAUydu3L4BlsMu/RGUIvFhPBsEctSLRzmFxY mpDa8ooS6JklGN1CZ9gVtoeL2pFErBmcP4ethueZlVWxHXIx3LohApm9qE4dRfkLUcUQayCW8mC X9tnOR2HXdOSI2QbJ+g== X-Google-Smtp-Source: AGHT+IHowabqTIUQAhwGR6H3lDw/MbSxyXp0scJMwSRdUOmCkDeIF9VXDDt3wLoCkgZ1GCn8fBoG90voSyasNhI9 X-Received: from yosry.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:29b4]) (user=yosryahmed job=sendgmr) by 2002:a05:6902:2b86:b0:dbe:d0a9:2be3 with SMTP id fj6-20020a0569022b8600b00dbed0a92be3mr255747ybb.3.1713403720188; Wed, 17 Apr 2024 18:28:40 -0700 (PDT) Date: Thu, 18 Apr 2024 01:28:34 +0000 In-Reply-To: <20240418012835.3360429-1-yosryahmed@google.com> Mime-Version: 1.0 References: <20240418012835.3360429-1-yosryahmed@google.com> X-Mailer: git-send-email 2.44.0.683.g7961c838ac-goog Message-ID: <20240418012835.3360429-2-yosryahmed@google.com> Subject: [PATCH tip:x86/mm v3 2/3] x86/mm: Fix LAM inconsistency during context switch From: Yosry Ahmed To: x86@kernel.org, Thomas Gleixner , Ingo Molnar Cc: Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , "Kirill A. Shutemov" , Rick Edgecombe , Andrew Morton , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Yosry Ahmed X-Rspamd-Queue-Id: 38F3640007 X-Stat-Signature: 9m7taig7eo5yz1py4gggn51pxtmb4gkj X-Rspam-User: X-Rspamd-Server: rspam07 X-HE-Tag: 1713403721-647648 X-HE-Meta: U2FsdGVkX18oppGb6DBWzgaYQqBM+IPVjFK3g313Wbm/LoIhhHHSQGvJ/qUZiyNKUVOew0+qtZdvFKxWLIV/LmIcifJ/D0TwiFsUjX93QcyNfVu/ifFEn46UlHD0L4g2Q3GpL2+wHmh0V4/mBg7HFX5NG+zU/UjcsOkl2G5LardfOvUQQEwqOZNu/j9yXykn5XiZF1jWnQrB8tesiKhvE8pA3crb58ONaE3i6WXyKlR3oV9fw15V3fTFc3lFulSDEjiMaL16WLFTRMtp0kGI2IltKRAEusWco2dNx06EaJHnFIWPl6HAa8aChqfbdP3l1ri/V9HJK4qcGXLsJ4te987c3cXMOst3PwW/UMqcb7RvkqenoVJjBv+fTnlPmKthFPPhhgb3y9AA2pzMIadXP8oIFGssr7/izpwHbpyAWBaHWU8u30F7jSs8okN35RKOJ/NOqosB/xI36EQMtOjKsxg0nUsxZCzMz90Z29K/GYjvwFPvc3mMjp6reynK6LdT51SqBQvzl4BP0OrhuVVM4Wm1wo8UgD4VqnQUN3bRP3oO479ImKlDr94pd7AI+mif+vsW2c6PHweXLB91KI9razxQIdyt/EGzAwILFVw95+ICR3uPj6G9dHy3PJhnWPpfRGEIfgAc9gYN8NikRISEDItwLDKbUKnK0byv9MQ7YJtzrm9Dn5nGsfaNYiXrwxOPRo7UCm/HSxbt8jT1Sgfa83jq0SOp0bEdnDLTzhmLOCy1sNl1ysmLopHTbrOP7eRg2S1MCz7JUbJN0ZAo3vGfQogRDJs9ag7KE2tZAUo4qSFE+t9XgyPt7Aqn6VZekq6XX36xC3nyUHLay2dprg1GQq6UPsMRikP5JxoF6G96iL/Z4Xc+9T/nsyRx4lT0j17cmeHa2rK7lVpQhigcfMhQ3cw3d5IV9V8oNaCA85hNwZScSKwZHut33fAqJ6M8Po+Sj+tUYLm5sngj5LstweD BiJ3641f xZJGH5mEB5hZ+ikPrQ+u6NOVKuSFY3FQSqtt6gQnmrbQdyCa3MS7sTdMUL7UlZijC9nJ+4CvuDU9n4bbC5T409zkxQlXWv1+LJVpqIDL80LAjDDJU/7Rx97gtiMK9BiToDLPQ6TA6BwbuoraOUsleujvpQoym0+42hjhvXADCEI/KfFnR+NU3cQDvqkI64P2we2FiVrNXLAEq2vi4saF7DDDX1gFfmjMEYqKT7aNjLIyXcGzmpseYSM4+/UNkLbguZngdq3NX4YaaXJKC+1IcijeBmyyipYPnSC2crmEQJ6SVdekZFudlvTOXi9pnBR26bcXKbbZzBo59tkqXyA/HAUabSO6QB+NrvvkRilKPVsJtSnLgnvXV4YObRRhcsRnkLVG3UDk8qcK5ZQZJVydp242/M5VgltTk5tFCnGBfIPunPNSDhwhjNbr4SVdbdrb5c26HhpkGJU7q5i8Ad3fzv9sJzMlwHkFQs0qeUvjAI+iPdsaCrAadpODmTiuuCQhuqXagL2Ik5pdIl4y4PxHcVAthuDw9GVvKxnFFyI+tbXP7fR+IL48FrJ1OApyeIktIPUzHHk8Oo8sV23VCiYEArBjL7OJKLWhMmnHrsk4i5iw/pFPCJWflCIWy7vIddLnL5Xj8t15QbXkJHsM/SWRJRVaQCLA0lQ8hqPSn6WgNvFjjdjI= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: LAM can only be enabled when a process is single-threaded. But _kernel_ threads can temporarily use a single-threaded process's mm. That means that a context-switching kernel thread can race and observe the mm's LAM metadata (mm->context.lam_cr3_mask) change. The context switch code does two logical things with that metadata: populate CR3 and populate 'cpu_tlbstate.lam'. If it hits this race, 'cpu_tlbstate.lam' and CR3 can end up out of sync. This de-synchronization is currently harmless. But it is confusing and might lead to warnings or real bugs. Update set_tlbstate_lam_mode() to take in the LAM mask and untag mask instead of an mm_struct pointer, and while we are at it, rename it to cpu_tlbstate_update_lam(). This should also make it clearer that we are updating cpu_tlbstate. In switch_mm_irqs_off(), read the LAM mask once and use it for both the cpu_tlbstate update and the CR3 update. Signed-off-by: Yosry Ahmed Reviewed-by: Kirill A. Shutemov --- arch/x86/include/asm/mmu_context.h | 8 +++++++- arch/x86/include/asm/tlbflush.h | 9 ++++----- arch/x86/kernel/process_64.c | 6 ++++-- arch/x86/mm/tlb.c | 8 +++++--- 4 files changed, 20 insertions(+), 11 deletions(-) diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index 8dac45a2c7fcf..19091ebb86338 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -88,7 +88,13 @@ static inline void switch_ldt(struct mm_struct *prev, struct mm_struct *next) #ifdef CONFIG_ADDRESS_MASKING static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) { - return mm->context.lam_cr3_mask; + /* + * When switch_mm_irqs_off() is called for a kthread, it may race with + * LAM enablement. switch_mm_irqs_off() uses the LAM mask to do two + * things: populate CR3 and populate 'cpu_tlbstate.lam'. Make sure it + * reads a single value for both. + */ + return READ_ONCE(mm->context.lam_cr3_mask); } static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 25726893c6f4d..69e79fff41b80 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -399,11 +399,10 @@ static inline u64 tlbstate_lam_cr3_mask(void) return lam << X86_CR3_LAM_U57_BIT; } -static inline void set_tlbstate_lam_mode(struct mm_struct *mm) +static inline void cpu_tlbstate_update_lam(unsigned long lam, u64 untag_mask) { - this_cpu_write(cpu_tlbstate.lam, - mm->context.lam_cr3_mask >> X86_CR3_LAM_U57_BIT); - this_cpu_write(tlbstate_untag_mask, mm->context.untag_mask); + this_cpu_write(cpu_tlbstate.lam, lam >> X86_CR3_LAM_U57_BIT); + this_cpu_write(tlbstate_untag_mask, untag_mask); } #else @@ -413,7 +412,7 @@ static inline u64 tlbstate_lam_cr3_mask(void) return 0; } -static inline void set_tlbstate_lam_mode(struct mm_struct *mm) +static inline void cpu_tlbstate_update_lam(unsigned long lam, u64 untag_mask) { } #endif diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index c27798f23ef82..cda2918f88f99 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -801,10 +801,12 @@ static long prctl_map_vdso(const struct vdso_image *image, unsigned long addr) static void enable_lam_func(void *__mm) { struct mm_struct *mm = __mm; + unsigned long lam; if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm) { - write_cr3(__read_cr3() | mm->context.lam_cr3_mask); - set_tlbstate_lam_mode(mm); + lam = mm_lam_cr3_mask(mm); + write_cr3(__read_cr3() | lam); + cpu_tlbstate_update_lam(lam, mm_untag_mask(mm)); } } diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index a041d2ecd8380..1fe9ba33c5805 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -632,7 +633,6 @@ void switch_mm_irqs_off(struct mm_struct *unused, struct mm_struct *next, } new_lam = mm_lam_cr3_mask(next); - set_tlbstate_lam_mode(next); if (need_flush) { this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen); @@ -651,6 +651,7 @@ void switch_mm_irqs_off(struct mm_struct *unused, struct mm_struct *next, this_cpu_write(cpu_tlbstate.loaded_mm, next); this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid); + cpu_tlbstate_update_lam(new_lam, mm_untag_mask(next)); if (next != prev) { cr4_update_pce_mm(next); @@ -697,6 +698,7 @@ void initialize_tlbstate_and_flush(void) int i; struct mm_struct *mm = this_cpu_read(cpu_tlbstate.loaded_mm); u64 tlb_gen = atomic64_read(&init_mm.context.tlb_gen); + unsigned long lam = mm_lam_cr3_mask(mm); unsigned long cr3 = __read_cr3(); /* Assert that CR3 already references the right mm. */ @@ -704,7 +706,7 @@ void initialize_tlbstate_and_flush(void) /* LAM expected to be disabled */ WARN_ON(cr3 & (X86_CR3_LAM_U48 | X86_CR3_LAM_U57)); - WARN_ON(mm_lam_cr3_mask(mm)); + WARN_ON(lam); /* * Assert that CR4.PCIDE is set if needed. (CR4.PCIDE initialization @@ -723,7 +725,7 @@ void initialize_tlbstate_and_flush(void) this_cpu_write(cpu_tlbstate.next_asid, 1); this_cpu_write(cpu_tlbstate.ctxs[0].ctx_id, mm->context.ctx_id); this_cpu_write(cpu_tlbstate.ctxs[0].tlb_gen, tlb_gen); - set_tlbstate_lam_mode(mm); + cpu_tlbstate_update_lam(lam, mm_untag_mask(mm)); for (i = 1; i < TLB_NR_DYN_ASIDS; i++) this_cpu_write(cpu_tlbstate.ctxs[i].ctx_id, 0);