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Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy , Kees Cook Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , Florian Weimer , Christian Brauner , Thiago Jung Bauermann , Ross Burton , David Spickett , Yury Khrustalev , Wilco Dijkstra , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; a=openpgp-sha256; l=2363; i=broonie@kernel.org; h=from:subject:message-id; bh=Ks8MFARHCgoYvKlZU6GLbHhVfaqXF8TPA2joPbZMDJ0=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBm/H7Mo7StH9NeEdFx4e51cOj/G4fz2GUpoEOK3dVF ihqzuxKJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZvx+zAAKCRAk1otyXVSH0E4VB/ 44Y/DcxPyyJpegtnqk2Xgu4LfuVN9YN36+8Wa/TWW/x1dk/OsduoSR0EhzeC2naITe38OnI2yNsg2r HN/GaAXzc9BwXtFDMkIxufE38zZBxSH6tb7DRcyR4t+sY0wc8QE2X3AAAG9PSGMiA56nu5zdYlC7XP PLgYHgUmzw+YfzPsfZBVE2jh1vAbXfixjIO03HSI1Rbp1UsVnoZspSK5JVdwcA5R6nZcMCt8dA9tEp bAEQuk72ftCeVy1fIrWWJlYMyaTZ2W23ceUAsMF+g+Ef8tFQJxR/QpzGSrU3J/a3W2zLuuMjMuopKW 7ReB4Wzd9fUI3XBDKdquXjtl43L8R+ X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspam-User: X-Rspamd-Queue-Id: 4101E1C0013 X-Rspamd-Server: rspam01 X-Stat-Signature: uq6dxeqdm7d9bwypyew9g3ce3x1mm9p6 X-HE-Tag: 1727823719-656191 X-HE-Meta: U2FsdGVkX1/tVkm9Mc++J50aPT4ge20lMknTuYvSV2UpBK/YYLVcUlqhFSgP/EId9/lXWVErIT3IjdR/vefl51UmTJUxMaMpmwnO5T4PgCnBdYhHOc/1pqkCcGcSWeiyK/raRXK4atvhGJr6loZaxDgJpVPvSYsgJfXUW0PMkgL4sY9IWmMJUTZRQjBUQT4Cjpanr38r/Ja5UN1KbPalixFfTs2a3QLSrgnVZIPpRTTG45R5zzjOdwFPjTWD/XVxE4znHaeCtgJ0II3TbvNmbjo0mCdK5GGwzLulB+uwRPPxO7mDGYqqh3MZ4ZpUrz8CGpg+awdoOmCA3dkWJ/BDcPPHefOkss4bYtZor4Sv4L1X7xhgJQoF6jO9V8YhU+5O459LQE4lsOQZHFumGrJL3HK9PIZzVabM6Ry8skpro13xZ4QC1MwLvSvD/ZE60XqEmWspFJa/Ck9yAgK9s/Dzk35UG/b+BtIZy5vSL5axdi4AvB6s1865snhZfon1xLcxxlGxjUB0S2kucZPSVN+H33G6sAELKeYebJ6QCXdILhYHqozmroC3cFA4ihInHviFA5omXt5m3ULoYlsR05Fc9LeREQqzyh0yI+7Ba3H09cLVJiV0yddT5JEFebt/JBQGYBEx9HX692WVZ1aYAatuE/5NAHKYdT12ix6cKHyXhUfmD2Ly/CKwKRT2rFfZLuiNmxzpWPdJmBaLG/HqI/kezv8WZj+eW4MPMsgJv6C2Zl9WWYX7/dAX+nehVqhTgh2XXqWC64STpob6ZFiJTjmH5WwACBisK+mQZCaj5ope1kocYHQJXePbMJcmYqH6ds72Ptp6rKR99AlyMNKrN3uS5NfcjRkRg2uclHblvK7vLnJCarxW+cxRl6uve2rNS1iChJiNFrHomwu7wa7EOx4hZgQ4uvSyRobNpDMYyvzAx3FyZgoIzGp6bEGCwjScJpQGn2TyjnXGj0e2N8WVtG1 kHRRspa4 jSbijx9LQa9Mt1JL09gmco5hZoOn0t8bRIhqObppV/uINPn10aYJq4FrkEBCajrgB/A+Cw+9psjWpSpzV03XZAaOJszOFURpnXAGBmKkt5+vkHJ/sM+Uf+6rCddzSdvdst4i/ReDhMkQLVnkesANM2pUGM7w0zDKL17W2P/SfJ3VMxff3sQh3/Bt0l9orZY2V28HcWOXjB0nBZtwEHjzHNtzhi1i7wNtqSTp/jgNAWLU7jyagRjojUt7wBqvP4b+3cbgBGWokqkYfbm59uBkmjQPCym7RpssPEVW5r1t2rspEpjn1Oo1yX0wP8ex1Q4yvBJMMywdzw/h+uRPnNy77i4/MyXC3vmG6s1/idrqsLWiLjdGdQ3sFyV/btBWWLB5ykQkX0F+xmQm5unzTXPT9blz0+PdA0CHD+PbndNeq1uLnD5jDi2/OniYc6w== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: There is a control HCRX_EL2.GCSEn which must be set to allow GCS features to take effect at lower ELs and also fine grained traps for GCS usage at EL0 and EL1. Configure all these to allow GCS usage by EL0 and EL1. We also initialise GCSCR_EL1 and GCSCRE0_EL1 to ensure that we can execute function call instructions without faulting regardless of the state when the kernel is started. Reviewed-by: Thiago Jung Bauermann Reviewed-by: Catalin Marinas Signed-off-by: Mark Brown Reported-by: Nathan Chancellor Signed-off-by: Marc Zyngier Reviewed-by: Catalin Marinas Tested-by: Catalin Marinas --- arch/arm64/include/asm/el2_setup.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index e0ffdf13a18b..27086a81eae3 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -27,6 +27,14 @@ ubfx x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 cbz x0, .Lskip_hcrx_\@ mov_q x0, HCRX_HOST_FLAGS + + /* Enable GCS if supported */ + mrs_s x1, SYS_ID_AA64PFR1_EL1 + ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4 + cbz x1, .Lset_hcrx_\@ + orr x0, x0, #HCRX_EL2_GCSEn + +.Lset_hcrx_\@: msr_s SYS_HCRX_EL2, x0 .Lskip_hcrx_\@: .endm @@ -200,6 +208,16 @@ orr x0, x0, #HFGxTR_EL2_nPOR_EL0 .Lskip_poe_fgt_\@: + /* GCS depends on PIE so we don't check it if PIE is absent */ + mrs_s x1, SYS_ID_AA64PFR1_EL1 + ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4 + cbz x1, .Lset_fgt_\@ + + /* Disable traps of access to GCS registers at EL0 and EL1 */ + orr x0, x0, #HFGxTR_EL2_nGCS_EL1_MASK + orr x0, x0, #HFGxTR_EL2_nGCS_EL0_MASK + +.Lset_fgt_\@: msr_s SYS_HFGRTR_EL2, x0 msr_s SYS_HFGWTR_EL2, x0 msr_s SYS_HFGITR_EL2, xzr @@ -215,6 +233,17 @@ .Lskip_fgt_\@: .endm +.macro __init_el2_gcs + mrs_s x1, SYS_ID_AA64PFR1_EL1 + ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4 + cbz x1, .Lskip_gcs_\@ + + /* Ensure GCS is not enabled when we start trying to do BLs */ + msr_s SYS_GCSCR_EL1, xzr + msr_s SYS_GCSCRE0_EL1, xzr +.Lskip_gcs_\@: +.endm + .macro __init_el2_nvhe_prepare_eret mov x0, #INIT_PSTATE_EL1 msr spsr_el2, x0 @@ -240,6 +269,7 @@ __init_el2_nvhe_idregs __init_el2_cptr __init_el2_fgt + __init_el2_gcs .endm #ifndef __KVM_NVHE_HYPERVISOR__