From patchwork Thu Oct 10 03:50:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bibo Mao X-Patchwork-Id: 13829445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA2C2CEDDBB for ; Thu, 10 Oct 2024 03:51:00 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id F2AF76B0093; Wed, 9 Oct 2024 23:50:57 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id EC0346B0092; Wed, 9 Oct 2024 23:50:57 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id D364C6B0089; Wed, 9 Oct 2024 23:50:57 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id B67416B0089 for ; Wed, 9 Oct 2024 23:50:57 -0400 (EDT) Received: from smtpin16.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 63EDE1A1A5C for ; Thu, 10 Oct 2024 03:50:52 +0000 (UTC) X-FDA: 82656316554.16.662458F Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by imf05.hostedemail.com (Postfix) with ESMTP id ECB2A100003 for ; Thu, 10 Oct 2024 03:50:53 +0000 (UTC) Authentication-Results: imf05.hostedemail.com; dkim=none; spf=pass (imf05.hostedemail.com: domain of maobibo@loongson.cn designates 114.242.206.163 as permitted sender) smtp.mailfrom=maobibo@loongson.cn; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1728532074; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6Iw/wAbEu0SHxzXukkARToGn17qUMEhn7+bxpypLMb0=; b=Qme2dgdr/C32zTOaPROLZUYJKGYLjWdS0Bw9BLfgOn3nM47Hn8RzvX2xMbt29gmZ/+ANZM ulQEeSB25VfwMYSdlsDhicRTOfq3x6/5Wber5hhA915laxKyfEuMlBAH7zjqfKATM3u/Nt pYSNOEflHWd1xT6fINt0RfdXnxItt6I= ARC-Authentication-Results: i=1; imf05.hostedemail.com; dkim=none; spf=pass (imf05.hostedemail.com: domain of maobibo@loongson.cn designates 114.242.206.163 as permitted sender) smtp.mailfrom=maobibo@loongson.cn; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1728532074; a=rsa-sha256; cv=none; b=7XT49707xYoqb+mKKQqN+2d+vtdvZC8wbwmCwe7fIXW5P7jYB0PvLZURCnMdVl6DWyd1AA eodiO+BrGXvoPNUlHB18vilydKNM3bw+WDdpzgqVtIMdWKDcUBgrWwc2AxZ/byEIZRh84r 6hsFp7RCd6U9LFGTR2vRvEgZK6IhSO0= Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxrrMbTwdn0LsRAA--.26964S3; Thu, 10 Oct 2024 11:50:51 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMDx7tUZTwdnFP8hAA--.52915S5; Thu, 10 Oct 2024 11:50:50 +0800 (CST) From: Bibo Mao To: Huacai Chen , Andrey Ryabinin , Andrew Morton Cc: David Hildenbrand , Barry Song , loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org Subject: [PATCH 3/4] LoongArch: Add barrier between set_pte and memory access Date: Thu, 10 Oct 2024 11:50:47 +0800 Message-Id: <20241010035048.3422527-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241010035048.3422527-1-maobibo@loongson.cn> References: <20241010035048.3422527-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMDx7tUZTwdnFP8hAA--.52915S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: ECB2A100003 X-Stat-Signature: z7yripc9susp885asupoft9yj9dtywh1 X-Rspam-User: X-HE-Tag: 1728532253-630459 X-HE-Meta: U2FsdGVkX1/+6V9QKxrP1RExrRzuIGosgHFUVPEDY+Ylc2pPxWzyACOwAvqvaoKpd8SR4GCeabFv/MoK2XDNyefhLoHHKzJ+Gi4bU5diKDmAxfTEE6lYbF3Z8OcTzsJ25oRMMo46A2P4/2U404dLwSDqTV5e0Tfn2sY2k5fBL79tIMez/AKBOI4gcz4czwzsFZ+RLdtzAdgVA4DT0N7T96qe4aS29l4zqT0V4Tmvsv/X5OoA/hqlcJln7YzR/50NIwXf1/UWIBzCuqifat+QB/ppuLMeU5SKWiBiXQHxkcLVL4oAJ6nPthWWSizNLjhvuAeEbwQQ89obDpAIseMMzD69iUYbyP+MyuGeHlVFqUt9SeEpuJRb+a4r8PoDTqHPsBBeUOxO8QaBUg33urhk5DXFSlGeyTTSGpIMysG//YGTvVs3ilF9kniav6QJOThgVtMDs23fKAG7pirBCxvA5TXMdEuSi6lIEbtTtMzF7XvBTbhZLvMZTEXfUBHgSbiDKkvPfBwWupTjHM6itzI8/KIodEEKeq28SzdkmOMGUBUuID/0RB3AviASeoeydjLTF8VdNgomF4gE8BJtJheIkIkcV+nYcL6ZiCsdRQOADhtEy2vEVXxvUUmERKkxOLL5ggdQi3bVC6uI8+UzB0qusQ5NXtPgkyPfGCPQgjGTuotBVF5vQZZ+4NwSmwxuU8scRMAWDa6SIEP8tCl8uky7VP+tTq8pH4upqpAXkGhNQqshKbezm8WNUj1XPIllEqDWYrX8k+EBt3brCEVOEb+AtWTRjx5IfKXxXJ5fwVgmQZb+SnhtXNIzBCl94qCif+SstCuFewiYLE5xUquYJiRA0MzoHW90ATx8Qr2K12PobicAF2NDbvzCEpqJKC+7w9bC6BDQvNJWjXuTpbBrbKvyqmpjBGR2U8qC25BR7snr+fKa9ij9AS0qbKTarIjxhoZFzSaLC6jvUQL+kJVoJQ8 HBGYCRnG aRYreGDflWO7h3pyOFKGBHVCBu1bm9Capbn69Gi84RtrE54oWWSpiN1PKWH6jdxiposjuljVqlzAphokauNwT0MZ6xhhH7HlSV2G4UI9ivnTPnkg2HOxcZ5uul/0mXDCMsNWN0kiJkLFNhDvuyv823ALBXg== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: It is possible to return a spurious fault if memory is accessed right after the pte is set. For user address space, pte is set in kernel space and memory is accessed in user space, there is long time for synchronization, no barrier needed. However for kernel address space, it is possible that memory is accessed right after the pte is set. Here flush_cache_vmap/flush_cache_vmap_early is used for synchronization. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/cacheflush.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/loongarch/include/asm/cacheflush.h b/arch/loongarch/include/asm/cacheflush.h index f8754d08a31a..53be231319ef 100644 --- a/arch/loongarch/include/asm/cacheflush.h +++ b/arch/loongarch/include/asm/cacheflush.h @@ -42,12 +42,24 @@ void local_flush_icache_range(unsigned long start, unsigned long end); #define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) #define flush_cache_vunmap(start, end) do { } while (0) #define flush_icache_user_page(vma, page, addr, len) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) +/* + * It is possible for a kernel virtual mapping access to return a spurious + * fault if it's accessed right after the pte is set. The page fault handler + * does not expect this type of fault. flush_cache_vmap is not exactly the + * right place to put this, but it seems to work well enough. + */ +static inline void flush_cache_vmap(unsigned long start, unsigned long end) +{ + smp_mb(); +} +#define flush_cache_vmap flush_cache_vmap +#define flush_cache_vmap_early flush_cache_vmap + #define cache_op(op, addr) \ __asm__ __volatile__( \ " cacop %0, %1 \n" \