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Tue, 29 Oct 2024 16:45:34 -0700 (PDT) From: Deepak Gupta Date: Tue, 29 Oct 2024 16:44:30 -0700 Subject: [PATCH v7 30/32] riscv: Documentation for landing pad / indirect branch tracking MIME-Version: 1.0 Message-Id: <20241029-v5_user_cfi_series-v7-30-2727ce9936cb@rivosinc.com> References: <20241029-v5_user_cfi_series-v7-0-2727ce9936cb@rivosinc.com> In-Reply-To: <20241029-v5_user_cfi_series-v7-0-2727ce9936cb@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Stat-Signature: 8j9bp1orwzjak53pfkxbt98eud8xm5dj X-Rspamd-Queue-Id: AE91440004 X-Rspam-User: X-Rspamd-Server: rspam10 X-HE-Tag: 1730245516-458497 X-HE-Meta: U2FsdGVkX1+jbpiHIaFHO/Qv6Ky3HSe92IjQbs6+ELBh4/QA5+Zzs7C9Apwhub+SC1bpnq4WyG3jGUtEZl/aZ/b6eBKRhuB1oxLlER4yqlYQZctK20cgt4nKtWLjDrzyEPNFfg6Pr4bT458QnzQGjFrQw2RK1nyAmIMUdcZo3oIO0h2iQbuEWo6z5Lb6C9lLm8EkNnDRpPjUlvA8f3gvDUsdqzibOj83JNCfqYRUF/70/ucoqQhY//7YK8vrPrtycFr5CW/DMknFqhNuRC8wYLTP7mq+LUN+Mtdp0HoAc4DS6Xjc2zheYwgIPydrjdOuDJK+YST7X1Zjv66xT+7on0LzR2kHk02tyRTnx2LIjnNaU5Eor1wxHYP1SmzW6HSua7fxqZWPG9QgaVcukLAjmpWzNXskW0WvUJkpAkWUBgcfZmuK5YDNFc5Lnf0xwyHEPj4O02btWOUhTS8ZfZw+w6HDhhVKoj5smgWS1a0ko5Ztq0OLLdltm8mGc2RDf46PlQfiso5H5jTOnbHWGx4AbCF2IykmgU3vNvRjTK7BdpEGVU3oFBlK0cizitdqKpiY4wclBJ3I6IV1AFEQC4npkBDkFxd+l94AILAoxE+0NXlVAcoCwxDnOOcht8TFV1sOu9Ge20SBo2jOn7+bTbRyan3oqoOy2utPVaarD1E9SXaPec6MPBFPUizpwN3NsIEsupg52ahDogWHw+ECXNDeeBHRi+evEpaG/4KdXCEWLGrDq90DrFbufGg1p9G0Fy4R22gW0mdPIyncMPl+gFliuxxSF6zVif5N6kz7tR34v7ledgk6RlaIYi9rrgrqcu2i9HNUj2l0Heh6rCbm0asWYBdotv7ZaJfVTMBOsLkPjn00iq8/hSNwd9WAZ9JqwVF90hf5PLgHw2JtdnqNNKeQErAEGH7VnM6wPsjhwuHNl0qIu+MwMwQJTIYxlYDQWLkbwJNSvfQyv98BfEC9FAJ m/wwjMMt V0r/4kbrQrcG207UJfr/hd5FqnpeWIdbelmCSD9AokxqL3RhqMv7U8YV2dA/0TSxdYT/HqVYVy7JbCHXrSFZL9kvb884zJ5Sdt1RAOb4YxZfXZBFRoLTOLgdVvRIg6MaDtcQ4mCx1UkMgG/Z9Y6RYJtxVLIziyxzOV3QCDlZABSa1d+lVK2cYVwZvXaCfeaEYPh3oOvlkhhqJcxjw1J4QZL21HDMtVKr3QJtDkkIIptxIVtd1xIKIvFcVeG1CEcUpa++wQ8VJtPP7iFgld9cFuv/suVPtdne9KkmvdbW051HxncQocUP9oDZJ0pp4L78oQcf5Rh0c559VSszt0GqNfdNP1o0HGuRIQOJqeBmu+7hZ7eFN9b7U/eQGfiJv1ReL8YfZZAya2RGvIsYvxav7+r4qgvDqtYXf2Q626F67ahUin3mmhY7NZi4WwHSIHwTAOzGmxoNB2vKYlR1lKVPA1NW51g== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Adding documentation on landing pad aka indirect branch tracking on riscv and kernel interfaces exposed so that user tasks can enable it. Signed-off-by: Deepak Gupta --- Documentation/arch/riscv/index.rst | 1 + Documentation/arch/riscv/zicfilp.rst | 115 +++++++++++++++++++++++++++++++++++ 2 files changed, 116 insertions(+) diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst index eecf347ce849..be7237b69682 100644 --- a/Documentation/arch/riscv/index.rst +++ b/Documentation/arch/riscv/index.rst @@ -14,6 +14,7 @@ RISC-V architecture uabi vector cmodx + zicfilp features diff --git a/Documentation/arch/riscv/zicfilp.rst b/Documentation/arch/riscv/zicfilp.rst new file mode 100644 index 000000000000..a188d78fcde6 --- /dev/null +++ b/Documentation/arch/riscv/zicfilp.rst @@ -0,0 +1,115 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Deepak Gupta +:Date: 12 January 2024 + +==================================================== +Tracking indirect control transfers on RISC-V Linux +==================================================== + +This document briefly describes the interface provided to userspace by Linux +to enable indirect branch tracking for user mode applications on RISV-V + +1. Feature Overview +-------------------- + +Memory corruption issues usually result in to crashes, however when in hands of +an adversary and if used creatively can result into variety security issues. + +One of those security issues can be code re-use attacks on program where adversary +can use corrupt function pointers and chain them together to perform jump oriented +programming (JOP) or call oriented programming (COP) and thus compromising control +flow integrity (CFI) of the program. + +Function pointers live in read-write memory and thus are susceptible to corruption +and allows an adversary to reach any program counter (PC) in address space. On +RISC-V zicfilp extension enforces a restriction on such indirect control +transfers: + +- indirect control transfers must land on a landing pad instruction ``lpad``. + There are two exception to this rule: + + - rs1 = x1 or rs1 = x5, i.e. a return from a function and returns are + protected using shadow stack (see zicfiss.rst) + + - rs1 = x7. On RISC-V compiler usually does below to reach function + which is beyond the offset possible J-type instruction:: + + auipc x7, + jalr (x7) + + Such form of indirect control transfer are still immutable and don't rely + on memory and thus rs1=x7 is exempted from tracking and considered software + guarded jumps. + +``lpad`` instruction is pseudo of ``auipc rd, `` with ``rd=x0`` and +is a HINT nop. ``lpad`` instruction must be aligned on 4 byte boundary and +compares 20 bit immediate withx7. If ``imm_20bit`` == 0, CPU don't perform any +comparision with ``x7``. If ``imm_20bit`` != 0, then ``imm_20bit`` must match +``x7`` else CPU will raise ``software check exception`` (``cause=18``) with +``*tval = 2``. + +Compiler can generate a hash over function signatures and setup them (truncated +to 20bit) in x7 at callsites and function prologues can have ``lpad`` with same +function hash. This further reduces number of program counters a call site can +reach. + +2. ELF and psABI +----------------- + +Toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_FCFI` for property +:c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in notes section of the object file. + +3. Linux enabling +------------------ + +User space programs can have multiple shared objects loaded in its address space +and it's a difficult task to make sure all the dependencies have been compiled +with support of indirect branch. Thus it's left to dynamic loader to enable +indirect branch tracking for the program. + +4. prctl() enabling +-------------------- + +:c:macro:`PR_SET_INDIR_BR_LP_STATUS` / :c:macro:`PR_GET_INDIR_BR_LP_STATUS` / +:c:macro:`PR_LOCK_INDIR_BR_LP_STATUS` are three prctls added to manage indirect +branch tracking. prctls are arch agnostic and returns -EINVAL on other arches. + +* prctl(PR_SET_INDIR_BR_LP_STATUS, unsigned long arg) + +If arg1 is :c:macro:`PR_INDIR_BR_LP_ENABLE` and if CPU supports ``zicfilp`` +then kernel will enabled indirect branch tracking for the task. Dynamic loader +can issue this :c:macro:`prctl` once it has determined that all the objects +loaded in address space support indirect branch tracking. Additionally if there +is a `dlopen` to an object which wasn't compiled with ``zicfilp``, dynamic +loader can issue this prctl with arg1 set to 0 (i.e. +:c:macro:`PR_INDIR_BR_LP_ENABLE` being clear) + +* prctl(PR_GET_INDIR_BR_LP_STATUS, unsigned long arg) + +Returns current status of indirect branch tracking. If enabled it'll return +:c:macro:`PR_INDIR_BR_LP_ENABLE` + +* prctl(PR_LOCK_INDIR_BR_LP_STATUS, unsigned long arg) + +Locks current status of indirect branch tracking on the task. User space may +want to run with strict security posture and wouldn't want loading of objects +without ``zicfilp`` support in it and thus would want to disallow disabling of +indirect branch tracking. In that case user space can use this prctl to lock +current settings. + +5. violations related to indirect branch tracking +-------------------------------------------------- + +Pertaining to indirect branch tracking, CPU raises software check exception in +following conditions: + +- missing ``lpad`` after indirect call / jmp +- ``lpad`` not on 4 byte boundary +- ``imm_20bit`` embedded in ``lpad`` instruction doesn't match with ``x7`` + +In all 3 cases, ``*tval = 2`` is captured and software check exception is +raised (``cause=18``) + +Linux kernel will treat this as :c:macro:`SIGSEV`` with code = +:c:macro:`SEGV_CPERR` and follow normal course of signal delivery.