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Mon, 11 Nov 2024 12:54:40 -0800 (PST) From: Deepak Gupta Date: Mon, 11 Nov 2024 12:54:02 -0800 Subject: [PATCH v8 17/29] riscv/traps: Introduce software check exception MIME-Version: 1.0 Message-Id: <20241111-v5_user_cfi_series-v8-17-dce14aa30207@rivosinc.com> References: <20241111-v5_user_cfi_series-v8-0-dce14aa30207@rivosinc.com> In-Reply-To: <20241111-v5_user_cfi_series-v8-0-dce14aa30207@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspamd-Queue-Id: 370B84000D X-Stat-Signature: tiwpodsgtkcjp9ep9torhhmubwxi1yyg X-Rspam-User: X-Rspamd-Server: rspam05 X-HE-Tag: 1731358439-120625 X-HE-Meta: U2FsdGVkX184JpqaxGxN/dBkFZo3q3iHDR3coVkGMFqJCr98ktZISvX0QmQlBhD+IcNfpreeQoyyUAbmwWT37VVtp7jF8p4bqG+0YXwYpyMdT9dnfU0PZ4LhEUUsaaMSc0UqZMAtZSmDyr4xSNB7YXzB5lbl1RT+YL+aA+QEoh921lVcJngY+qZLi2RlP/ND0KwX0Sfs6QxnM00UtShiTcZ6+ffRq6E8d+QWS6hzkPeKvZi4ZudmFxzcoU2A2zw5NdFQPQ4bxBOkxgTvZfV3ExizjUgMh/gYvpQRxNkuD8gD5ZGsq1fdUBXM4tRTY4VCetCu/DZYkNTWoCZq/5QddSkfMZj//pKLMnmLhC08ORZG6w9cBdrlJcoF58EPIRnotPJ2s2q02L0vl/pAGCnAPq4v9YMQZW4HzOwjioTIYMovknYF09lPxdcmqAU8eMcmdZYT7u+Y6t13Zo/RLYYSEVGggAILiHhZzR3hlMlaighZl1GOtgFcqpktscgBK/BnAhg7Rprf77TSTe+tGCXtBZHDqVpwK7D7MerPN84ye5J6w19VlYBtBbSHwSYEoZn4/NcDUgX5CO9zjTcPNKBHKiUsevIu4fJXNUA82qrQjELKRmc8hFUj87qu7hmy0XFOjbtK8eXyU8zIwbKDZ9KVrRo+6DTndrjo7aDtBH/nhr6VJa4ffqijbJDcmL3WXkfDj3MeH2gZgtuIZ2su8y8enWMPIdfsrhHayaWjss7rPOUowTAMk3WpXedr9QRtoz1iK+NmGxF5lW+ft4CARDqTyJlz/ldfSYcx8ytRqkDnD+yTdxH0H6mVqjg8j3FGatVz3n020GHnilV+eydXcHmhRnw9pO5y2tRSH/FuaUGlLj/J5byrp97vy1pOQYk66b852bAyI0A66X7Y1DcbC/w9ZRkqvo6xUw+mv9AE8IFsQZQDDrEvYXHGZ6404IA9HEg8ZRhCaW+ebwjGWRyH3b3 IylkgbWQ jDSsmAKLwJM7JPVsMZG/0p28GY+n8ExU36D9wdpdvFdm1bX0rH6nRDmMu4T1Euu7gU6ktu0sTM979A5V8H4QR+ytZTOdY48rdxHGJtJjZWEK+4CPMnjEeQGubLBS6Uj1RvH6ZNwIpHAYWvj8Bo8mW3X/82gt/SDBE7rONJvATu4JWoz1+p4cGAPGs79ydNfQisxFmh7iZhgYQgULgaATsgzeQ9HM7kkIq0OP4w+0SCxz4gohGa9GO2IHBrZEvLmp4m3Uy8N7G3y3wOkEtWBsdKRA+Y8GVgy+A2PMRpXgiR4tpaJ0ZzvBjiBytJdJWiM743pZifUkBDGegJbA00+FZU80Y0LrWh5ksSpUGZaxyyEOTKO1Z2WOCkKmb51jGoWAIJfAAZMlhCAxgWwegZCfJtn4x/0/Vu4k4uOtg1a3YI1wRWbrpDkM7V9Osn3ip2RLBaA2sGUg0ioJc6+8= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: zicfiss / zicfilp introduces a new exception to priv isa `software check exception` with cause code = 18. This patch implements software check exception. Additionally it implements a cfi violation handler which checks for code in xtval. If xtval=2, it means that sw check exception happened because of an indirect branch not landing on 4 byte aligned PC or not landing on `lpad` instruction or label value embedded in `lpad` not matching label value setup in `x7`. If xtval=3, it means that sw check exception happened because of mismatch between link register (x1 or x5) and top of shadow stack (on execution of `sspopchk`). In case of cfi violation, SIGSEGV is raised with code=SEGV_CPERR. SEGV_CPERR was introduced by x86 shadow stack patches. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/asm-prototypes.h | 1 + arch/riscv/include/asm/entry-common.h | 2 ++ arch/riscv/kernel/entry.S | 3 +++ arch/riscv/kernel/traps.c | 42 +++++++++++++++++++++++++++++++++ 4 files changed, 48 insertions(+) diff --git a/arch/riscv/include/asm/asm-prototypes.h b/arch/riscv/include/asm/asm-prototypes.h index cd627ec289f1..5a27cefd7805 100644 --- a/arch/riscv/include/asm/asm-prototypes.h +++ b/arch/riscv/include/asm/asm-prototypes.h @@ -51,6 +51,7 @@ DECLARE_DO_ERROR_INFO(do_trap_ecall_u); DECLARE_DO_ERROR_INFO(do_trap_ecall_s); DECLARE_DO_ERROR_INFO(do_trap_ecall_m); DECLARE_DO_ERROR_INFO(do_trap_break); +DECLARE_DO_ERROR_INFO(do_trap_software_check); asmlinkage void handle_bad_stack(struct pt_regs *regs); asmlinkage void do_page_fault(struct pt_regs *regs); diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h index 7b32d2b08bb6..0f6448583a87 100644 --- a/arch/riscv/include/asm/entry-common.h +++ b/arch/riscv/include/asm/entry-common.h @@ -28,4 +28,6 @@ void handle_break(struct pt_regs *regs); int handle_misaligned_load(struct pt_regs *regs); int handle_misaligned_store(struct pt_regs *regs); +bool handle_user_cfi_violation(struct pt_regs *regs); + #endif /* _ASM_RISCV_ENTRY_COMMON_H */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index a1f258fd7bbc..aaef4604d841 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -471,6 +471,9 @@ SYM_DATA_START_LOCAL(excp_vect_table) RISCV_PTR do_page_fault /* load page fault */ RISCV_PTR do_trap_unknown RISCV_PTR do_page_fault /* store page fault */ + RISCV_PTR do_trap_unknown /* cause=16 */ + RISCV_PTR do_trap_unknown /* cause=17 */ + RISCV_PTR do_trap_software_check /* cause=18 is sw check exception */ SYM_DATA_END_LABEL(excp_vect_table, SYM_L_LOCAL, excp_vect_table_end) #ifndef CONFIG_MMU diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 51ebfd23e007..225b1d198ab6 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -354,6 +354,48 @@ void do_trap_ecall_u(struct pt_regs *regs) } +#define CFI_TVAL_FCFI_CODE 2 +#define CFI_TVAL_BCFI_CODE 3 +/* handle cfi violations */ +bool handle_user_cfi_violation(struct pt_regs *regs) +{ + bool ret = false; + unsigned long tval = csr_read(CSR_TVAL); + + if (((tval == CFI_TVAL_FCFI_CODE) && cpu_supports_indirect_br_lp_instr()) || + ((tval == CFI_TVAL_BCFI_CODE) && cpu_supports_shadow_stack())) { + do_trap_error(regs, SIGSEGV, SEGV_CPERR, regs->epc, + "Oops - control flow violation"); + ret = true; + } + + return ret; +} +/* + * software check exception is defined with risc-v cfi spec. Software check + * exception is raised when:- + * a) An indirect branch doesn't land on 4 byte aligned PC or `lpad` + * instruction or `label` value programmed in `lpad` instr doesn't + * match with value setup in `x7`. reported code in `xtval` is 2. + * b) `sspopchk` instruction finds a mismatch between top of shadow stack (ssp) + * and x1/x5. reported code in `xtval` is 3. + */ +asmlinkage __visible __trap_section void do_trap_software_check(struct pt_regs *regs) +{ + if (user_mode(regs)) { + irqentry_enter_from_user_mode(regs); + + /* not a cfi violation, then merge into flow of unknown trap handler */ + if (!handle_user_cfi_violation(regs)) + do_trap_unknown(regs); + + irqentry_exit_to_user_mode(regs); + } else { + /* sw check exception coming from kernel is a bug in kernel */ + die(regs, "Kernel BUG"); + } +} + #ifdef CONFIG_MMU asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs) {