Message ID | 20241111-v5_user_cfi_series-v8-26-dce14aa30207@rivosinc.com (mailing list archive) |
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State | New |
Headers | show
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AJvYcCUn5PIGFSgDjVNJChMByO65gUsxlb8mUaG+HRc1mgWKUsCMRKHrm/graRojtDzNR1p9KjxtB844UA==@kvack.org X-Gm-Message-State: AOJu0YwByNrttBgr0RpIAdqGMyXn4jdrEJcLpGCZMihiFIEf1hg6gfJL YoCnwmAaknQVRayDIAXEwCRAys9vWWJiHAXvDHoifTUDvOQwUmpNTIMaF/IO0yU= X-Google-Smtp-Source: AGHT+IFzBuraYyYmpM+mIAMFI16Yg/jetlEaju2rqc5UFMlTYdZs+XaMbAKQKjfpaEa7usCG1NdnaQ== X-Received: by 2002:a17:90b:4d11:b0:2e2:b922:48a with SMTP id 98e67ed59e1d1-2e9b173aff9mr21100247a91.18.1731358505869; Mon, 11 Nov 2024 12:55:05 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e9a5fd1534sm9059974a91.42.2024.11.11.12.55.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Nov 2024 12:55:05 -0800 (PST) From: Deepak Gupta <debug@rivosinc.com> Date: Mon, 11 Nov 2024 12:54:11 -0800 Subject: [PATCH v8 26/29] riscv: create a config for shadow stack and landing pad instr support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20241111-v5_user_cfi_series-v8-26-dce14aa30207@rivosinc.com> References: <20241111-v5_user_cfi_series-v8-0-dce14aa30207@rivosinc.com> In-Reply-To: <20241111-v5_user_cfi_series-v8-0-dce14aa30207@rivosinc.com> To: Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, Dave Hansen <dave.hansen@linux.intel.com>, x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>, Andrew Morton <akpm@linux-foundation.org>, "Liam R. Howlett" <Liam.Howlett@oracle.com>, Vlastimil Babka <vbabka@suse.cz>, Lorenzo Stoakes <lorenzo.stoakes@oracle.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Christian Brauner <brauner@kernel.org>, Peter Zijlstra <peterz@infradead.org>, Oleg Nesterov <oleg@redhat.com>, Eric Biederman <ebiederm@xmission.com>, Kees Cook <kees@kernel.org>, Jonathan Corbet <corbet@lwn.net>, Shuah Khan <shuah@kernel.org> Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta <debug@rivosinc.com> X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Server: rspam03 X-Rspamd-Queue-Id: F0CC71C0010 X-Stat-Signature: 84owusabdnwyzk6jn3nbcuxpwo6rog3d X-HE-Tag: 1731358488-634386 X-HE-Meta: U2FsdGVkX185sCTfr1cneIHrne6j03ycfbh8DqEzP6yjFOZ/4C3I56HfVZvEoB2FsjNHO4iTLgUi6T/TgokiUYLdLCv2FHq+FvBtSfe43eRazRy5QbpudpnUWnOf1omRmmZQSWjY5gJspj5qZPenczCZ4G6AkpthI4Ei9ks5q1ZePXP68ngGEckCXo1nydhFVau15iNAmP9L44NHkJ9RkJAQ2yeaU7VVnc8cJOMkwsJD1e7+MHlU/JfMGI9uaGJtN2dMEn0m40fCuD6yXZJmubnnzMHpVdSNCLPBzMyf4bXAvmAcpKc2uiFagHRwQtdcOUewIuNC+qgr78rKGo3ndjm6unWi92bzMdlOKKQobSNntHb+Mrm9K7UOTEOPdOhLHsWR7Ab++tnmTlz8Hw//DFv/U8W1O4ce+oihr7kslXUi14XHPPN8c/WKoLcWtNW7Dw5XmiKK3m1WM6emGghNltvOkxnkdN0K1zmdfibk594N8szu51eTbFOjI5RhNV7GAfNI1xT/OJ2XqT4A2BCjeIRWksF3onAp3y9Y1HspcfxDBqFcZZVX49k1VrGfXSRoeFPNp7Q4kOnul9wpKb08/LRxlBSP43TMIo1alJBgs+v2/GTpjPXAVMlGfXODwE3m7+RUzmz1hTND2tBNc1j4jRolBCiP9Fh8WCPoyqFSBTtJBJsmuOzEzNR9rFRrRsQzyas7eujNBOb4CgukYZuCeiimO8DYJk+77n3dTXJ/DOv2NjhCMJwzdEMALoYZAxBg1tLlTfj6mityknuFWmZfvNNVA7pi+WvIpz2TI0d1yys+h3ygrBZqUM3nm9nWLVJrwXMVU+mC+p7ji5pqvcInqiff89D9ee8rpgabz3T4QNLSvKH7k9jFpdeHE2srLCKPM5R7r/yvBMvEWRUPWaLrFMT1dBvMZ+784DcBt2FRCK2/osGT7ZAA3gaknag4XVozSo3TkwajkiV+FIewk6Z nDks3zDJ 9kLQiKdS8WAF4mZN/bVKjEhCkRaHlv3BGwJ83Yh7Lh3hsTr4ZL9rMk+WugvJ/rN3PQeW418RlXp1rCJT/znoTkTGCsGCeHnQa3TBVT2/5qvdSYHvUzXbfei/9L0DuofC+NWc4TTSUWv8DCI1NeP7xjYonTjE74iJ5n2WqUIp+hLPXugwFN8uPUVPH5L9Zv8TI+mFbTRinnQlZYN1Q1/OBF9BuQh3X5MqY0eHcTwYeN39h+hbozcM1bTjry6tU3oecPg06OnmAJgbG9ZAIHs1qBtt9jFWKZHLPb1JyI7rnARkQSyVZcN1ebYTwy7IBFomA3xpXvCrY3OiCfPkE54+oSOyN3HPirPKevaVKKW/PJy5J/Kq3RzZfQJq22eCBuRg4jMTIOnmu2+5j81O/4qs+cP0JT0z2N8WuDXbpqW3zKZnIqaCbThQX/iw2ibUthoiSyu6lqFAdVfj0PDX0tFIlbTawVOl/ZJBIb5peATGGcHgv/Nw= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: <linux-mm.kvack.org> List-Subscribe: <mailto:majordomo@kvack.org> List-Unsubscribe: <mailto:majordomo@kvack.org> |
Series |
riscv control-flow integrity for usermode
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expand
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diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 5bdda86ada37..0887a9ae0c20 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -246,6 +246,26 @@ config ARCH_HAS_BROKEN_DWARF5 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 depends on LD_IS_LLD && LLD_VERSION < 180000 +config RISCV_USER_CFI + def_bool y + bool "riscv userspace control flow integrity" + depends on 64BIT && $(cc-option,-mabi=lp64 -march=rv64ima_zicfiss) + depends on RISCV_ALTERNATIVE + select ARCH_HAS_USER_SHADOW_STACK + select ARCH_USES_HIGH_VMA_FLAGS + select DYNAMIC_SIGFRAME + help + Provides CPU assisted control flow integrity to userspace tasks. + Control flow integrity is provided by implementing shadow stack for + backward edge and indirect branch tracking for forward edge in program. + Shadow stack protection is a hardware feature that detects function + return address corruption. This helps mitigate ROP attacks. + Indirect branch tracking enforces that all indirect branches must land + on a landing pad instruction else CPU will fault. This mitigates against + JOP / COP attacks. Applications must be enabled to use it, and old user- + space does not get protection "for free". + default y + config ARCH_MMAP_RND_BITS_MIN default 18 if 64BIT default 8
This patch creates a config for shadow stack support and landing pad instr support. Shadow stack support and landing instr support can be enabled by selecting `CONFIG_RISCV_USER_CFI`. Selecting `CONFIG_RISCV_USER_CFI` wires up path to enumerate CPU support and if cpu support exists, kernel will support cpu assisted user mode cfi. If CONFIG_RISCV_USER_CFI is selected, select `ARCH_USES_HIGH_VMA_FLAGS`, `ARCH_HAS_USER_SHADOW_STACK` and DYNAMIC_SIGFRAME for riscv. Signed-off-by: Deepak Gupta <debug@rivosinc.com> --- arch/riscv/Kconfig | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)