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Thu, 21 Nov 2024 18:19:19 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.19.247) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Thu, 21 Nov 2024 11:19:18 +0100 From: Jonathan Cameron To: , , , CC: , , Yicong Yang , Niyas Sait , , Vandana Salve , Davidlohr Bueso , Dave Jiang , Alison Schofield , Ira Weiny , Dan Williams , Alexander Shishkin , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Gregory Price , Huang Ying Subject: [RFC PATCH 1/4] cxl: Register devices for CXL Hotness Monitoring Units (CHMU) Date: Thu, 21 Nov 2024 10:18:42 +0000 Message-ID: <20241121101845.1815660-2-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241121101845.1815660-1-Jonathan.Cameron@huawei.com> References: <20241121101845.1815660-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.122.19.247] X-ClientProxiedBy: lhrpeml500004.china.huawei.com (7.191.163.9) To frapeml500008.china.huawei.com (7.182.85.71) X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 59AB5180002 X-Stat-Signature: yj1jg1cwkf9qtds8uobqtro9jyrwuass X-Rspam-User: X-HE-Tag: 1732184354-474353 X-HE-Meta: U2FsdGVkX18k99Q0i1b4iX0bzCvxeQFTJ2DWep3/9MgIlgtdyDbou+nmHjlXSd4JNyj+9C7CpD1jODC+CRHUL6G3pr1DZdBRI9gCgM2IQ6R/F/LJSL4VXwbHCy6b00QwKPgIXIYG3OrtJS+fEsIFDFNwEg4ennilqmPBCcdlt3RTNmcdC/Fqc+trqmx5mage4bH8v31MAXPhuA8FLYAuUb/UW+qmYJ5JClF22VjdVk5Q0O1Lx24KbrihEke5Aim6EslK1T2u86h4Wd8Q7+67/M/5J4MobTS08CX3Z69qbjSzMgDiOVXzocXk7Zk2LhCdaQyXFmaLBrEI/ww4tCaDISOdrq9ZDLSLJ7PN3b165WPH1SjXXAr/YWIYWjJF5mn6q6hn7k/ijETt5qnqWXOXk/BCzsrmaA7HLEElk/XIzxQesP8/ScOPYLkc26COs1+b2XxbAlb4A3MUodEv3oBzNTV4TbXBQ6jfuyn8dOd81f0Jv8qc/bNTVjXC1lQRL2fIG3TlWxcjtrJ89zn4H3NR2fDczFmhGB2KOV3Jfh/+RIAID/J/QMXjkgViVkqlMg0pCNBy8m5gU7zR7LMNYOAC/ELSNMYPUSx4vFB8XR+5U0XRa1Xw/cduCRk0sf3Fq3IPYX1+Yi/G9dsfyy+cGDm1KXdDlqf5pIAITZmQnAx/8MazITNSUrlA6b0CCRAM9IdbXskWAUNgGONQ82OGYI1//8OjSRX1I8bSci0BeMfCdpUjHnFBMkFnsI7nSsngznUn4QqhEkqPwGKEo0VOLM5ICxFAmlGR3LrrIycz/agZ7SJO3ele7R1Zm1yTvB1YEPfJzLebazPSKm81E0RvJ9IyEkawKv3wQZbA7IcsIbgMQYYra8+bQD6fi4JC7QgujSS6JU1Bx3NbjWTlpHpBAIxj6ZgDxbOFbpQ1nhBiT40Vs9HXvkGW6zg7JvUuDPS2MvUIEBihPtbOM0ljhYuDunt mtd3ik0D EaGnoolwj1lMMnlY3lF8wxW26fE6e9oYUuKaX/swg4R3pywIR2+NqpASUwcXqfYY0u+rgRh/AME6ZQBARTsAUWNIGs/FMs0WxJrwQEoiv9JcKcFLQiRhVds/pQb7BUJecBocIS4fpeFpAA1YJYX6RJDG4qauAm9/Ghhgf5+GiBeFje4Y= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Basic registration using similar approach to how the CPMUs are registered. Signed-off-by: Jonathan Cameron --- drivers/cxl/core/Makefile | 1 + drivers/cxl/core/hmu.c | 64 +++++++++++++++++++++++++++++++++++++++ drivers/cxl/core/regs.c | 14 +++++++++ drivers/cxl/cxl.h | 4 +++ drivers/cxl/cxlpci.h | 1 + drivers/cxl/hmu.h | 23 ++++++++++++++ drivers/cxl/pci.c | 26 +++++++++++++++- 7 files changed, 132 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile index 9259bcc6773c..d060abb773ae 100644 --- a/drivers/cxl/core/Makefile +++ b/drivers/cxl/core/Makefile @@ -12,6 +12,7 @@ cxl_core-y += memdev.o cxl_core-y += mbox.o cxl_core-y += pci.o cxl_core-y += hdm.o +cxl_core-y += hmu.o cxl_core-y += pmu.o cxl_core-y += cdat.o cxl_core-$(CONFIG_TRACING) += trace.o diff --git a/drivers/cxl/core/hmu.c b/drivers/cxl/core/hmu.c new file mode 100644 index 000000000000..3ee938bb6c05 --- /dev/null +++ b/drivers/cxl/core/hmu.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2024 Huawei. All rights reserved. */ + +#include +#include +#include +#include +#include +#include +#include "core.h" + +static void cxl_hmu_release(struct device *dev) +{ + struct cxl_hmu *hmu = to_cxl_hmu(dev); + + kfree(hmu); +} + +const struct device_type cxl_hmu_type = { + .name = "cxl_hmu", + .release = cxl_hmu_release, +}; + +static void remove_dev(void *dev) +{ + device_unregister(dev); +} + +int devm_cxl_hmu_add(struct device *parent, struct cxl_hmu_regs *regs, + int assoc_id, int index) +{ + struct cxl_hmu *hmu; + struct device *dev; + int rc; + + hmu = kzalloc(sizeof(*hmu), GFP_KERNEL); + if (!hmu) + return -ENOMEM; + + hmu->assoc_id = assoc_id; + hmu->index = index; + hmu->base = regs->hmu; + dev = &hmu->dev; + device_initialize(dev); + device_set_pm_not_required(dev); + dev->parent = parent; + dev->bus = &cxl_bus_type; + dev->type = &cxl_hmu_type; + rc = dev_set_name(dev, "hmu_mem%d.%d", assoc_id, index); + if (rc) + goto err; + + rc = device_add(dev); + if (rc) + goto err; + + return devm_add_action_or_reset(parent, remove_dev, dev); + +err: + put_device(&hmu->dev); + return rc; +} +EXPORT_SYMBOL_NS_GPL(devm_cxl_hmu_add, CXL); + diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c index e1082e749c69..c12afaa6ef98 100644 --- a/drivers/cxl/core/regs.c +++ b/drivers/cxl/core/regs.c @@ -401,6 +401,20 @@ int cxl_map_pmu_regs(struct cxl_register_map *map, struct cxl_pmu_regs *regs) } EXPORT_SYMBOL_NS_GPL(cxl_map_pmu_regs, CXL); +int cxl_map_hmu_regs(struct cxl_register_map *map, struct cxl_hmu_regs *regs) +{ + struct device *dev = map->host; + resource_size_t phys_addr; + + phys_addr = map->resource; + regs->hmu = devm_cxl_iomap_block(dev, phys_addr, map->max_size); + if (!regs->hmu) + return -ENOMEM; + + return 0; +} +EXPORT_SYMBOL_NS_GPL(cxl_map_hmu_regs, CXL); + static int cxl_map_regblock(struct cxl_register_map *map) { struct device *host = map->host; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 5406e3ab3d4a..8172bc1f7a8d 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -227,6 +227,9 @@ struct cxl_regs { struct_group_tagged(cxl_pmu_regs, pmu_regs, void __iomem *pmu; ); + struct_group_tagged(cxl_hmu_regs, hmu_regs, + void __iomem *hmu; + ); /* * RCH downstream port specific RAS register @@ -292,6 +295,7 @@ int cxl_map_component_regs(const struct cxl_register_map *map, unsigned long map_mask); int cxl_map_device_regs(const struct cxl_register_map *map, struct cxl_device_regs *regs); +int cxl_map_hmu_regs(struct cxl_register_map *map, struct cxl_hmu_regs *regs); int cxl_map_pmu_regs(struct cxl_register_map *map, struct cxl_pmu_regs *regs); enum cxl_regloc_type; diff --git a/drivers/cxl/cxlpci.h b/drivers/cxl/cxlpci.h index 4da07727ab9c..71f5e9620137 100644 --- a/drivers/cxl/cxlpci.h +++ b/drivers/cxl/cxlpci.h @@ -67,6 +67,7 @@ enum cxl_regloc_type { CXL_REGLOC_RBI_VIRT, CXL_REGLOC_RBI_MEMDEV, CXL_REGLOC_RBI_PMU, + CXL_REGLOC_RBI_HMU, CXL_REGLOC_RBI_TYPES }; diff --git a/drivers/cxl/hmu.h b/drivers/cxl/hmu.h new file mode 100644 index 000000000000..c4798ed9764b --- /dev/null +++ b/drivers/cxl/hmu.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright(c) 2024 Huawei + * CXL Specification rev 3.2 Setion 8.2.8 (CHMU Register Interface) + */ +#ifndef CXL_HMU_H +#define CXL_HMU_H +#include + +#define CXL_HMU_REGMAP_SIZE 0xe00 /* Table 8-32 CXL 3.0 specification */ +struct cxl_hmu { + struct device dev; + void __iomem *base; + int assoc_id; + int index; +}; + +#define to_cxl_hmu(dev) container_of(dev, struct cxl_hmu, dev) +struct cxl_hmu_regs; +int devm_cxl_hmu_add(struct device *parent, struct cxl_hmu_regs *regs, + int assoc_id, int idx); + +#endif diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 188412d45e0d..e89ea9d3f007 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -15,6 +15,7 @@ #include "cxlmem.h" #include "cxlpci.h" #include "cxl.h" +#include "hmu.h" #include "pmu.h" /** @@ -814,7 +815,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) struct cxl_dev_state *cxlds; struct cxl_register_map map; struct cxl_memdev *cxlmd; - int i, rc, pmu_count; + int i, rc, hmu_count, pmu_count; bool irq_avail; /* @@ -938,6 +939,29 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) } } + hmu_count = cxl_count_regblock(pdev, CXL_REGLOC_RBI_HMU); + for (i = 0; i < hmu_count; i++) { + struct cxl_hmu_regs hmu_regs; + + rc = cxl_find_regblock_instance(pdev, CXL_REGLOC_RBI_HMU, &map, i); + if (rc) { + dev_dbg(&pdev->dev, "Could not find HMU regblock\n"); + break; + } + + rc = cxl_map_hmu_regs(&map, &hmu_regs); + if (rc) { + dev_dbg(&pdev->dev, "Could not map HMU regs\n"); + break; + } + + rc = devm_cxl_hmu_add(cxlds->dev, &hmu_regs, cxlmd->id, i); + if (rc) { + dev_dbg(&pdev->dev, "Could not add HMU instance\n"); + break; + } + } + rc = cxl_event_config(host_bridge, mds, irq_avail); if (rc) return rc;