From patchwork Sun Jan 12 15:53:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rik van Riel X-Patchwork-Id: 13936442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06B6CE77188 for ; Sun, 12 Jan 2025 15:55:48 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 1BC386B0092; Sun, 12 Jan 2025 10:55:43 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id D62896B009E; Sun, 12 Jan 2025 10:55:42 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 9FAAC6B0098; Sun, 12 Jan 2025 10:55:42 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 635A46B0099 for ; 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b=tf+YT3rKaRFANE8fWlBGh442+logzj8xStlFuxIWECx4vLIGIfVLHtUIGmolJFxu7VfCX1 1ErufDY7Im1e1SMqMgUCI5YoUo7F/82JgWH3b/DoKRfctU3s6D2CuaRX1lKDPlNt7iyDn3 8UP2gLxvzL56q2JCH6LSCehLzaDF4WA= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1736697340; a=rsa-sha256; cv=none; b=YyPe9S3mZ6xsQjGMQPEtAaLYZo4VXNx1/9W7jtYxbqQwYZ8xyF0nYk3TKwa9GvxSa84ZlY VAnlX/1zVcXonMZ/6lil4nOh3rnP1aaKRIHK3UX4GhT1QW3lZL5/BP/NFNhiH9DEKCvPMq iVebKe2PgBt2G0MOgTSmMqXe4LHLn+s= ARC-Authentication-Results: i=1; imf17.hostedemail.com; dkim=none; spf=pass (imf17.hostedemail.com: domain of riel@shelob.surriel.com designates 96.67.55.147 as permitted sender) smtp.mailfrom=riel@shelob.surriel.com; dmarc=none Received: from fangorn.home.surriel.com ([10.0.13.7]) by shelob.surriel.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.97.1) (envelope-from ) id 1tX0Ii-0000000010W-3ULi; Sun, 12 Jan 2025 10:54:56 -0500 From: Rik van Riel To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, bp@alien8.de, peterz@infradead.org, dave.hansen@linux.intel.com, zhengqi.arch@bytedance.com, nadav.amit@gmail.com, thomas.lendacky@amd.com, kernel-team@meta.com, linux-mm@kvack.org, akpm@linux-foundation.org, jannh@google.com, Rik van Riel Subject: [PATCH v4 10/12] x86,tlb: do targeted broadcast flushing from tlbbatch code Date: Sun, 12 Jan 2025 10:53:54 -0500 Message-ID: <20250112155453.1104139-11-riel@surriel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250112155453.1104139-1-riel@surriel.com> References: <20250112155453.1104139-1-riel@surriel.com> MIME-Version: 1.0 X-Rspamd-Server: rspam10 X-Rspamd-Queue-Id: 66B7140016 X-Stat-Signature: wg98pu34173yi4446ojrzkty9r1iz8y7 X-Rspam-User: X-HE-Tag: 1736697340-203948 X-HE-Meta: U2FsdGVkX1+3cfHkXVT5POqwJNjapY82bv3nSRgDmPgDR6uccNlAAImXV/UY3EFLIThegZok19MEhEqoHao4SfCJV3+KnN6lQViMDsPc4MsRoNCJkiEc/N162mQbSuhe2M5C7kCk3dSTLz1ytO+DJAa+yWWnvAdZH09LOEV1cVoQa3WtU2ar9zBWUsX1+kBgS8xbiHV4kLFkcpK57meF4QmRdu2fAInkvTmH+XeneAU6lBASstT+daODwz3c/JS3tNaAS/tZVXp92SgL8NdegpxTnUbhgxCmXXYlS+HlDrriLt19WVIMkLWvYxvhXqcSw+Z2k2F6alwqiXPr640heprKbM5/TFinsMKoagSZflsguykE2Btn7bCM0yTTYJTO7Xt2Asy3OV79DklcF9PSPC7Koxd8oIAeW4uZQ9fRhVfnOLVVEEw4HMAhSbusqa+aj8OJVk6420h84+HUG6/03mKmI/GnawigpT8xxs8fkuzxJnfv3lQ+zVk+VuGw6dljoKokDIYEuxMJ5J53N38zuN5c1odSF3YEAi7RBdd6iKXVbGcDFOeZYLp1M332Okddt99h/Z17ZvB6mL9Hq13SBRKzc2Ih73UgQo/Z0Hlx1okyWkWyOEaHaJrPVfcl54+XkYrPwc1XEn2Rq1aIFy5VBZKNoyeqS8SdXRAW1zNbRX8FQaKQz44i5Et4UcZp1NHY5yyqzZXYrvW0pvK69He3C2fs4IQfU9YKxkZd9cqrD9UeUEgiJktOTrbVPvzcpgN651a6KVEuWZsvN3uRkAxouoOrSofTBhvTHlURo3wsxju03SFJQyVFZfHboZiJWSJ4iO6fJJrAnr5vMV42KDOPuami3/vlPuoa9b4HjjOsd+VgVAujDqZLJm1RyY7NkPk35xdObqOUnccpqdr3zQSlU3qORhE0B6h3CmplXm1nGwKwv6Fzk0CPUfrx5YcVIg5ZwR7EP+Dzp6T3huknl7s rkizTj0m 58SymvhJoHxvw0Pnz15WUnJyeMuO3O6jBuklGXGYwrbExwott2+1FKBGFWIa5rvvGxvMO3vPN6irSkNR0HyZfZBZ2bth69Fs/epTSJbjjgk3WyGIETcnZA5PHIFh+/HJ4lP5SOmb4SqcjIduidr0pZavpkgXI+pcvt3hiU0l7GTFC62q1JEpNXZ0KKsuX5LJUfu1kgIm+rzD+NHrSJGtFoFV84v64CVqAEJs0z7jIsDgxtr/Ifsnc7TT2dPJZM1VBW507omvpPCTMPavxccde3fqr5ZuRBffIp8SLE75KqE42gpizRvtFxOiBVlF/2zLjiNbOe+HAt+B5y/b+rsRXFnwsPP9ufjT+j4nkZV+AZ17KRaj5z6dvw97g0zKXndUIkJcoqpdSeG+WJjPDXxG1tUntywyrLhxxDp7OsUz0L53r+HY= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Instead of doing a system-wide TLB flush from arch_tlbbatch_flush, queue up asynchronous, targeted flushes from arch_tlbbatch_add_pending. This also allows us to avoid adding the CPUs of processes using broadcast flushing to the batch->cpumask, and will hopefully further reduce TLB flushing from the reclaim and compaction paths. Signed-off-by: Rik van Riel --- arch/x86/include/asm/tlbbatch.h | 1 + arch/x86/include/asm/tlbflush.h | 12 +++------- arch/x86/mm/tlb.c | 41 ++++++++++++++++++++++++++++++--- 3 files changed, 42 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/tlbbatch.h b/arch/x86/include/asm/tlbbatch.h index 1ad56eb3e8a8..f9a17edf63ad 100644 --- a/arch/x86/include/asm/tlbbatch.h +++ b/arch/x86/include/asm/tlbbatch.h @@ -10,6 +10,7 @@ struct arch_tlbflush_unmap_batch { * the PFNs being flushed.. */ struct cpumask cpumask; + bool used_invlpgb; }; #endif /* _ARCH_X86_TLBBATCH_H */ diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index cd244cdd49dd..fa4fcafa8b87 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -350,21 +350,15 @@ static inline u64 inc_mm_tlb_gen(struct mm_struct *mm) return atomic64_inc_return(&mm->context.tlb_gen); } -static inline void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *batch, - struct mm_struct *mm, - unsigned long uaddr) -{ - inc_mm_tlb_gen(mm); - cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm)); - mmu_notifier_arch_invalidate_secondary_tlbs(mm, 0, -1UL); -} - static inline void arch_flush_tlb_batched_pending(struct mm_struct *mm) { flush_tlb_mm(mm); } extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); +extern void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *batch, + struct mm_struct *mm, + unsigned long uaddr); static inline bool pte_flags_need_flush(unsigned long oldflags, unsigned long newflags, diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index 80375ef186d5..532911fbb12a 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -1658,9 +1658,7 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) * a local TLB flush is needed. Optimize this use-case by calling * flush_tlb_func_local() directly in this case. */ - if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) { - invlpgb_flush_all_nonglobals(); - } else if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids) { + if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids) { flush_tlb_multi(&batch->cpumask, info); } else if (cpumask_test_cpu(cpu, &batch->cpumask)) { lockdep_assert_irqs_enabled(); @@ -1669,12 +1667,49 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) local_irq_enable(); } + /* + * If we issued (asynchronous) INVLPGB flushes, wait for them here. + * The cpumask above contains only CPUs that were running tasks + * not using broadcast TLB flushing. + */ + if (cpu_feature_enabled(X86_FEATURE_INVLPGB) && batch->used_invlpgb) { + tlbsync(); + migrate_enable(); + batch->used_invlpgb = false; + } + cpumask_clear(&batch->cpumask); put_flush_tlb_info(); put_cpu(); } +void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *batch, + struct mm_struct *mm, + unsigned long uaddr) +{ + if (static_cpu_has(X86_FEATURE_INVLPGB) && mm_global_asid(mm)) { + u16 asid = mm_global_asid(mm); + /* + * Queue up an asynchronous invalidation. The corresponding + * TLBSYNC is done in arch_tlbbatch_flush(), and must be done + * on the same CPU. + */ + if (!batch->used_invlpgb) { + batch->used_invlpgb = true; + migrate_disable(); + } + invlpgb_flush_user_nr_nosync(kern_pcid(asid), uaddr, 1, false); + /* Do any CPUs supporting INVLPGB need PTI? */ + if (static_cpu_has(X86_FEATURE_PTI)) + invlpgb_flush_user_nr_nosync(user_pcid(asid), uaddr, 1, false); + } else { + inc_mm_tlb_gen(mm); + cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm)); + } + mmu_notifier_arch_invalidate_secondary_tlbs(mm, 0, -1UL); +} + /* * Blindly accessing user memory from NMI context can be dangerous * if we're in the middle of switching the current user task or