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Fri, 14 Mar 2025 14:40:00 -0700 (PDT) From: Deepak Gupta Date: Fri, 14 Mar 2025 14:39:32 -0700 Subject: [PATCH v12 13/28] prctl: arch-agnostic prctl for indirect branch tracking MIME-Version: 1.0 Message-Id: <20250314-v5_user_cfi_series-v12-13-e51202b53138@rivosinc.com> References: <20250314-v5_user_cfi_series-v12-0-e51202b53138@rivosinc.com> In-Reply-To: <20250314-v5_user_cfi_series-v12-0-e51202b53138@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-Rspam-User: X-Rspamd-Server: rspam11 X-Rspamd-Queue-Id: 21EB38000C X-Stat-Signature: 5cgroehstzatpjg5wyqga3dkp494zrdu X-HE-Tag: 1741988401-97360 X-HE-Meta: U2FsdGVkX1/yLDcIiNHw2ZzutJRyZnsvs44H8wOkzWH/3huI0UAU2Rx6o6epcAakAqkfQakwj5d1wKy9Roc0mqc4XR4Ozn/mu3jlgzemYBXXXFIotu6m4RsYgKgo0qS21BQ4t/p7FQCLG6aJtj6WpmZfOzdqs1us5Liw3uDVSKQAgFOHTZrRu2MSUpf9Rj61obqsmRg55VucovwT9L4UXSIvX1u1sCyxSMIkRCgphy2PxyvPIXu5jpO8stM/mSRL6Fg8gcb0fOokHrGmZoNRULd6t1JSQCpm7pXHzs2ue1cw5Q61G0h22UQan2JP+UwF4AoSsoVCFk4+ieVibytsl+6t0dCKVjD/f4Fg1pkttmPBPmBAkq2lKsO8s1o/23kZo43l7+HMgWhR6pi++Iw6RAImkYVzdjcroltr27mD0L61FO0B4gZFN1saKp19VK3kGy98ugpKiU2IendgLxMGIx4AuGQq7LmdBgwELpZO9t8v4Vhm7LcXd6iJU4z63hq7h2Qhzlu/G40SHSF7f2QNY9dswneFytRPCbTrjQRJM/ArsnlSm4ReIA5bxLjbKGLPPxrIKv9PfDxE7S4lQoo9PW4Ca0ohEkVEPdvMFpxWaOm4cEscUsNciSDkethKhNivSK1OU4Ic4Z41jf6QAHF7uK4Az/A4B9zxzQK2Rzmu7qBkqjvUOi9VSNo1iI/L2a/FKI2RXzzTbczEWVH+U1ntC90Z+15vhgT0UoVWSY+/NTqpnn0tAz1wwBJ153pAHCWpvehDEtANZtWMUZjoM4cI5MCNm34km9w2MstrJgIpGnZAauPzFWBvdbIm0KvsvfcWD5UlxPQ5ta0nqixzOrW1DkwQsAB0Pj2daP3zwPyErb8VpLVlHhB/83+XQXgQV4qtX728Mmjur5K4SdJOYZWRlf95MCSodWs03LJ9vPamr5G8e4weqtiRblfGP8H+jCPmTMCWD/yVrGanny0K1dY h9fFEPnJ io3Fxy8dy0nfY0FWLbVh00vypyiG9v12j7w2/KLGBV4U9RNX9tPKSwQG3dUX3X561PQ/1gCngR2Eq6wLOLL7BBSbIbLcjI+L96R0ubslVRFKNjzg= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Three architectures (x86, aarch64, riscv) have support for indirect branch tracking feature in a very similar fashion. On a very high level, indirect branch tracking is a CPU feature where CPU tracks branches which uses memory operand to perform control transfer in program. As part of this tracking on indirect branches, CPU goes in a state where it expects a landing pad instr on target and if not found then CPU raises some fault (architecture dependent) x86 landing pad instr - `ENDBRANCH` arch64 landing pad instr - `BTI` riscv landing instr - `lpad` Given that three major arches have support for indirect branch tracking, This patch makes `prctl` for indirect branch tracking arch agnostic. To allow userspace to enable this feature for itself, following prtcls are defined: - PR_GET_INDIR_BR_LP_STATUS: Gets current configured status for indirect branch tracking. - PR_SET_INDIR_BR_LP_STATUS: Sets a configuration for indirect branch tracking. Following status options are allowed - PR_INDIR_BR_LP_ENABLE: Enables indirect branch tracking on user thread. - PR_INDIR_BR_LP_DISABLE; Disables indirect branch tracking on user thread. - PR_LOCK_INDIR_BR_LP_STATUS: Locks configured status for indirect branch tracking for user thread. Signed-off-by: Deepak Gupta Reviewed-by: Mark Brown --- include/linux/cpu.h | 4 ++++ include/uapi/linux/prctl.h | 27 +++++++++++++++++++++++++++ kernel/sys.c | 30 ++++++++++++++++++++++++++++++ 3 files changed, 61 insertions(+) diff --git a/include/linux/cpu.h b/include/linux/cpu.h index 6a0a8f1c7c90..fb0c394430c6 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -204,4 +204,8 @@ static inline bool cpu_mitigations_auto_nosmt(void) } #endif +int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status); +int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status); +int arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status); + #endif /* _LINUX_CPU_H_ */ diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h index 5c6080680cb2..6cd90460cbad 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -353,4 +353,31 @@ struct prctl_mm_map { */ #define PR_LOCK_SHADOW_STACK_STATUS 76 +/* + * Get the current indirect branch tracking configuration for the current + * thread, this will be the value configured via PR_SET_INDIR_BR_LP_STATUS. + */ +#define PR_GET_INDIR_BR_LP_STATUS 77 + +/* + * Set the indirect branch tracking configuration. PR_INDIR_BR_LP_ENABLE will + * enable cpu feature for user thread, to track all indirect branches and ensure + * they land on arch defined landing pad instruction. + * x86 - If enabled, an indirect branch must land on `ENDBRANCH` instruction. + * arch64 - If enabled, an indirect branch must land on `BTI` instruction. + * riscv - If enabled, an indirect branch must land on `lpad` instruction. + * PR_INDIR_BR_LP_DISABLE will disable feature for user thread and indirect + * branches will no more be tracked by cpu to land on arch defined landing pad + * instruction. + */ +#define PR_SET_INDIR_BR_LP_STATUS 78 +# define PR_INDIR_BR_LP_ENABLE (1UL << 0) + +/* + * Prevent further changes to the specified indirect branch tracking + * configuration. All bits may be locked via this call, including + * undefined bits. + */ +#define PR_LOCK_INDIR_BR_LP_STATUS 79 + #endif /* _LINUX_PRCTL_H */ diff --git a/kernel/sys.c b/kernel/sys.c index cb366ff8703a..f347f3518d0b 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -2336,6 +2336,21 @@ int __weak arch_lock_shadow_stack_status(struct task_struct *t, unsigned long st return -EINVAL; } +int __weak arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status) +{ + return -EINVAL; +} + +int __weak arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + +int __weak arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + #define PR_IO_FLUSHER (PF_MEMALLOC_NOIO | PF_LOCAL_THROTTLE) #ifdef CONFIG_ANON_VMA_NAME @@ -2811,6 +2826,21 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, return -EINVAL; error = arch_lock_shadow_stack_status(me, arg2); break; + case PR_GET_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_get_indir_br_lp_status(me, (unsigned long __user *)arg2); + break; + case PR_SET_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_set_indir_br_lp_status(me, arg2); + break; + case PR_LOCK_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_lock_indir_br_lp_status(me, arg2); + break; default: trace_task_prctl_unknown(option, arg2, arg3, arg4, arg5); error = -EINVAL;