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[212.227.15.4]) by mx.google.com with ESMTPS id m66-v6si3144592wmm.192.2018.10.13.02.55.13 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 13 Oct 2018 02:55:13 -0700 (PDT) Received-SPF: pass (google.com: domain of jan.kiszka@web.de designates 212.227.15.4 as permitted sender) client-ip=212.227.15.4; Authentication-Results: mx.google.com; spf=pass (google.com: domain of jan.kiszka@web.de designates 212.227.15.4 as permitted sender) smtp.mailfrom=jan.kiszka@web.de Received: from [192.168.1.10] ([95.157.57.47]) by smtp.web.de (mrweb002 [213.165.67.108]) with ESMTPSA (Nemesis) id 0LpwIR-1fhjN403tv-00fju8; Sat, 13 Oct 2018 11:55:01 +0200 Received: from [192.168.1.10] ([95.157.57.47]) by smtp.web.de (mrweb002 [213.165.67.108]) with ESMTPSA (Nemesis) id 0LpwIR-1fhjN403tv-00fju8; Sat, 13 Oct 2018 11:55:01 +0200 Subject: [PATCH] x86/entry/32: Fix setup of CS high bits From: Jan Kiszka To: Joerg Roedel , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Linus Torvalds , Andy Lutomirski , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , aliguori@amazon.com, daniel.gruss@iaik.tugraz.at, hughd@google.com, keescook@google.com, Andrea Arcangeli References: <1531906876-13451-1-git-send-email-joro@8bytes.org> <1531906876-13451-11-git-send-email-joro@8bytes.org> <97421241-2bc4-c3f1-4128-95b3e8a230d1@siemens.com> Message-ID: <35a24feb-5970-aa03-acbf-53428a159ace@web.de> Date: Sat, 13 Oct 2018 11:54:54 +0200 User-Agent: Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666 MIME-Version: 1.0 In-Reply-To: <97421241-2bc4-c3f1-4128-95b3e8a230d1@siemens.com> Content-Language: en-US X-Provags-ID: V03:K1:46apdO8moDu5QHFVU11jJ6e9YB2KSg5ysNjNpLtGN795QjOXZR+ BIJk5T9jQJK4E0w+8eXXP756wE8D0QyA87XH9ATa/StWQNDY/HCgkgsXViYHeklhTYH0mma ecBvkN0Vz9kKDZlBF5xn+HmBUWEek8g0qkfJzZgF3rvspDDzmGTVWISAalMWxPiMPvtGiOQ oAArQ3WVB05Bl1MY8x1fw== X-UI-Out-Filterresults: notjunk:1;V01:K0:F7fHc4ajTRs=:fdkSt1FJ3KxC+FF24byc/T VLCoq3efYFGOX0C+HOgF9kKwLdZUGbjFMeLJiWbuL2IG0oC3YIkgXu273BLHPQQA6Q4u/tiHT lbHi05yWcqYpjTbqaeIQ/eMITxvHPOyAkC3qBYOXAejrfBuJ5B5ahC9fKS8jLJ+InoZbNWqqq jkv1yBm3GzMLPqfdNXX1RHko3cZM2Uo9VMwssBUkeyPG2X+ajprEkRgQDBFDUJZY/Upch4cW8 bBspY7h5XtfJGW04s1UymYFCfxPLn34d+Y6eCmZNFXt73qVkrdmrZ3jc5A9aBe3XmrshqBRUT 9yZpf1mwybspxULU6ZBQgThIb86hE+D7sw9qnKFl3ZEvjHaqXezR8GrYHjMiUa/8rFKkvhTU0 Zt5PIOK2/4/TtL49xPK+osMYU0Qh8shJaufp59x238e2iCc20JpkPTLyKai+PbzvXwNXN6H/d daqY162idpwfO5WFK67w2RIP/t5Gg9KUYLNHaaTLIHwWkP/LX9YnVdrIqEZPPsUIzWpeLLGwh JYhoiLmOet5mbW36575bQVMQ6ltb1P6N56sFqoZBJ8oVzppTlZFzz1b8RBa5XYNKcAL275GhG 4U6S0B6MgJhkR9snyMxq6H0AaWTO0mSRCLzvMtXmhhflW9L756PaDUsbg7f4rDclyIN4Jg2Zr afl5LUTwUiJpHQC7Wc/IDj+vmrihkkuZNU9wTuuONhCtwObczOA4AuQkLzZNTb+jBOEP24lPd R3RE7rYFaNsiECmY2CfJs73Yg1FnGl76pMN79WAF2cfJBzAoZU8RLfoYEwxsPyW07XEAlPzKe zQaleoHaFxzepdXqXihiUm1XSnrYY0WxYgKdRk9DJLW17+cArY= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: X-Virus-Scanned: ClamAV using ClamSMTP From: Jan Kiszka Even if we are not on an entry stack, we have to initialize the CS high bits because we are unconditionally evaluating them PARANOID_EXIT_TO_KERNEL_MODE. Failing to do so broke the boot on Galileo Gen2 and IOT2000 boards. Fixes: b92a165df17e ("x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack") Signed-off-by: Jan Kiszka Acked-by: Joerg Roedel Reviewed-by: Joerg Roedel --- arch/x86/entry/entry_32.S | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S index 2767c625a52c..95c94d48ecd2 100644 --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -389,6 +389,12 @@ * that register for the time this macro runs */ + /* + * Clear unused upper bits of the dword containing the word-sized CS + * slot in pt_regs in case hardware didn't clear it for us. + */ + andl $(0x0000ffff), PT_CS(%esp) + /* Are we on the entry stack? Bail out if not! */ movl PER_CPU_VAR(cpu_entry_area), %ecx addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx @@ -407,12 +413,6 @@ /* Load top of task-stack into %edi */ movl TSS_entry2task_stack(%edi), %edi - /* - * Clear unused upper bits of the dword containing the word-sized CS - * slot in pt_regs in case hardware didn't clear it for us. - */ - andl $(0x0000ffff), PT_CS(%esp) - /* Special case - entry from kernel mode via entry stack */ #ifdef CONFIG_VM86 movl PT_EFLAGS(%esp), %ecx # mix EFLAGS and CS